IEEE Electron Device Letters, 0741-3106

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  1. 2018
  2. A Self-aligned Gate-last Process applied to All-III-V CMOS on Si

    Jonsson, A., Johannes Svensson & Lars Erik Wernersson, 2018 May 16, In : IEEE Electron Device Letters.

    Research output: Contribution to journalArticle

  3. Capacitance Measurements in Vertical III-V Nanowire TFETs

    Markus Hellenbrand, Memisevic, E., Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 May 4, In : IEEE Electron Device Letters. 39, 7, p. 943-946 4 p.

    Research output: Contribution to journalLetter

  4. 2017
  5. 2016
  6. High-Performance Lateral Nanowire InGaAs MOSFETs with Improved On-Current

    Zota, C. B., Lars Erik Wernersson & Erik Lind, 2016 Oct 1, In : IEEE Electron Device Letters. 37, 10, p. 1264-1267 4 p., 7552490

    Research output: Contribution to journalArticle

  7. 3-D Integrated Track-and-Hold Circuit Using InAs Nanowire MOSFETs and Capacitors

    Wu, J. & Lars Erik Wernersson, 2016 Jul 1, In : IEEE Electron Device Letters. 37, 7, p. 851-854 4 p., 7478620

    Research output: Contribution to journalArticle

  8. 2014
  9. Asymmetric InGaAs/InP MOSFETs With Source/Drain Engineering

    Mo, J., Erik Lind & Lars-Erik Wernersson, 2014, In : IEEE Electron Device Letters. 35, 5, p. 515-517

    Research output: Contribution to journalArticle

  10. High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates

    Johansson, S., Memisevic, E., Lars-Erik Wernersson & Erik Lind, 2014, In : IEEE Electron Device Letters. 35, 5, p. 518-520

    Research output: Contribution to journalArticle

  11. RF and DC Analysis of Stressed InGaAs MOSFETs

    Roll, G., Erik Lind, Egard, M., Johansson, S., Lars Ohlsson & Lars-Erik Wernersson, 2014, IEEE Electron Device Letters, 35, 2, p. 181-183

    Research output: Contribution to specialist publication or newspaperSpecialist publication article

  12. 2013
  13. 2012
  14. High-Frequency Performance of Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET

    Egard, M., Lars Ohlsson, Ärlelid, M., Persson, K-M., Mattias Borg, Filip Lenrick, Reine Wallenberg, Erik Lind & Lars-Erik Wernersson, 2012, In : IEEE Electron Device Letters. 33, 3, p. 369-371

    Research output: Contribution to journalArticle

  15. High-Performance InAs Nanowire MOSFETs

    Dey, A., Claes Thelander, Erik Lind, Kimberly Dick Thelander, Mattias Borg, Magnus Borgström, Nilsson, P. & Lars-Erik Wernersson, 2012, In : IEEE Electron Device Letters. 33, 6, p. 791-793

    Research output: Contribution to journalArticle

  16. In0.53Ga0.47As RTD-MOSFET Millimeter-Wave Wavelet Generator

    Egard, M., Ärlelid, M., Lars Ohlsson, Mattias Borg, Erik Lind & Lars-Erik Wernersson, 2012, In : IEEE Electron Device Letters. 33, 7, p. 970-972

    Research output: Contribution to journalArticle

  17. Vertical InAs nanowire MOSFETs with IDS = 1.34 mA/µm and gm = 1.19 mS/µm at VDS = 0.5 V

    Persson, K-M., Berg, M., Mattias Borg, Wu, J., Henrik Sjöland, Erik Lind & Lars-Erik Wernersson, 2012, In : IEEE Electron Device Letters. p. 195-196

    Research output: Contribution to journalPublished meeting abstract

  18. 2011
  19. Memristive and Memcapacitive Characteristics of a Au/Ti-HfO2-InP/InGaAs Diode

    Sun, J., Erik Lind, Maximov, I. & Hongqi Xu, 2011, In : IEEE Electron Device Letters. 32, 2, p. 131-133

    Research output: Contribution to journalArticle

  20. 2010
  21. Low-frequency noise in vertical InAs nanowire FETs

    Persson, K-M., Erik Lind, Dey, A., Claes Thelander, Henrik Sjöland & Lars-Erik Wernersson, 2010, In : IEEE Electron Device Letters. 31, 5, p. 428-430

    Research output: Contribution to journalArticle

  22. 2008
  23. A novel SR latch device realized by integration of three-terminal ballistic junctions in InGaAs/InP

    Sun, J., Wallin, D., Maximov, I. & Hongqi Xu, 2008, In : IEEE Electron Device Letters. 29, 6, p. 540-542

    Research output: Contribution to journalArticle

  24. Heterostructure Barriers in Wrap Gated Nanowire FETs

    Fröberg, L., Rehnstedt, C., Claes Thelander, Erik Lind, Lars-Erik Wernersson & Lars Samuelson, 2008, In : IEEE Electron Device Letters. 29, 9, p. 981-983

    Research output: Contribution to journalLetter

  25. Vertical enhancement-mode InAs nanowire field-effect transistor with 50-nm wrap gate

    Claes Thelander, Fröberg, L., Rehnstedt, C., Lars Samuelson & Lars-Erik Wernersson, 2008, In : IEEE Electron Device Letters. 29, 3, p. 206-208

    Research output: Contribution to journalArticle

  26. 2006
  27. Vertical high-mobility wrap-gated InAs nanowire transistor

    Bryllert, T., Lars-Erik Wernersson, Fröberg, L. & Lars Samuelson, 2006, In : IEEE Electron Device Letters. 27, 5, p. 323-325

    Research output: Contribution to journalArticle

  28. 2004
  29. Novel nanoelectronic triodes and logic devices with TBJs

    Hongqi Xu, Shorubalko, I., Wallin, D., Maximov, I., Pär Omling, Lars Samuelson & Seifert, W., 2004, In : IEEE Electron Device Letters. 25, 4, p. 164-166

    Research output: Contribution to journalArticle

  30. Resonant tunneling permeable base transistors with high transconductance

    Erik Lind, Lindström, P. & Lars-Erik Wernersson, 2004, In : IEEE Electron Device Letters. 25, 10, p. 678-680

    Research output: Contribution to journalArticle

  31. 2002
  32. A novel frequency-multiplication device based on three-terminal ballistic junction

    Shorubalko, I., Hongqi Xu, Maximov, I., Nilsson, D., Pär Omling, Lars Samuelson & Seifert, W., 2002, In : IEEE Electron Device Letters. 23, 7, p. 377-379

    Research output: Contribution to journalArticle