Erik Lind

Senior Lecturer, Ph.D.
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  1. 2018
  2. Effect of Gate Oxide Defects on Tunnel Transistor RF Performance

    Markus Hellenbrand, Memisevic, E., Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 Jun 25, 2018 76th Device Research Conference (DRC). IEEE--Institute of Electrical and Electronics Engineers Inc., p. 137-138 2 p.

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  3. Fabrication of Tunnel Field-Effect Transistors

    Abinaya Krishnaraja, Memisevic, E., Markus Hellenbrand, Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2018 May 24, (Unpublished)

    Research output: Contribution to conferencePaper, not in proceeding

  4. RF Characterisation of Vertical III-V Nanowire Tunnel FETs

    Markus Hellenbrand, Memisevic, E., Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 May 24, (Unpublished)

    Research output: Contribution to conferencePaper, not in proceeding

  5. Capacitance Measurements in Vertical III-V Nanowire TFETs

    Markus Hellenbrand, Memisevic, E., Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 May 4, In : IEEE Electron Device Letters. 39, 7, p. 943-946 4 p.

    Research output: Contribution to journalLetter

  6. 2017
  7. Junctionless tri-gate InGaAs MOSFETs

    Zota, C. B., Mattias Borg, Lars Erik Wernersson & Erik Lind, 2017 Dec 1, In : Japanese Journal of Applied Physics. 56, 12, 120306

    Research output: Contribution to journalArticle

  8. InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors

    Memisevic, E., Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2017 Nov, In : IEEE Transactions on Electron Devices. 64, 11, p. 4746-4751

    Research output: Contribution to journalArticle

  9. Random telegraph signal noise in tunneling field-effect transistors with S below 60 mV/decade

    Markus Hellenbrand, Memisevic, E., Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2017 Sep, 47th European Solid-State Device Research Conference (ESSDERC), 2017. IEEE--Institute of Electrical and Electronics Engineers Inc., p. 38-41 4 p.

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  10. First InGaAs lateral nanowire MOSFET RF noise measurements and model

    Lars Ohlsson, Fredrik Lindelow, Zota, C. B., Ohlrogge, M., Merkle, T., Lars Erik Wernersson & Erik Lind, 2017 Aug 1, 75th Annual Device Research Conference, DRC 2017. Institute of Electrical and Electronics Engineers Inc., 7999451

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  11. Record performance for junctionless transistors in InGaAs MOSFETs

    Zota, C. B., Mattias Borg, Lars Erik Wernersson & Erik Lind, 2017 Jul 31, 2017 Symposium on VLSI Technology, VLSI Technology 2017. Institute of Electrical and Electronics Engineers Inc., p. T34-T35 7998190

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  12. Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with Ion = 330 μa/μm at Ioff = 100 nA/μm and VD = 0.5 v

    Olli Pekka Kilpi, Wu, J., Johannes Svensson, Erik Lind & Lars Erik Wernersson, 2017 Jul 31, 2017 Symposium on VLSI Technology, VLSI Technology 2017. Institute of Electrical and Electronics Engineers Inc., p. T36-T37 7998191

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  13. 1/f and RTS noise in InGaAs nanowire MOSFETs

    Möhle, C., Zota, C. B., M. Hellenbrand & E. Lind, 2017 Jun 25, In : Microelectronic Engineering. 178, p. 52-55 4 p.

    Research output: Contribution to journalArticle

  14. Gated Hall effect measurements on selectively grown InGaAs nanowires

    F. Lindelöw, Zota, C. B. & E. Lind, 2017 Apr 25, In : Nanotechnology. 28, 20, 205204

    Research output: Contribution to journalArticle

  15. InGaAs tri-gate MOSFETs with record on-current

    Zota, C. B., Fredrik Lindelow, Lars Erik Wernersson & Erik Lind, 2017 Jan 31, 2016 IEEE International Electron Devices Meeting, IEDM 2016. Institute of Electrical and Electronics Engineers Inc., p. 3.2.1-3.2.4 7838336

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  16. Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V

    Memisevic, E., J. Svensson, M. Hellenbrand, E. Lind & L. E. Wernersson, 2017 Jan 31, 2016 IEEE International Electron Devices Meeting, IEDM 2016. Institute of Electrical and Electronics Engineers Inc., p. 19.1.1-19.1.4 7838450

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  17. Impact of doping and diameter on the electrical properties of GaSb nanowires

    Babadi, A. S., Johannes Svensson, Erik Lind & Lars Erik Wernersson, 2017 Jan 30, In : Applied Physics Letters. 110, 5, 053502

    Research output: Contribution to journalArticle

  18. Statistics of InAs/InGaAsSb/GaSb TFETs with sub-50 mV/decade operation at VDS of 0.3V

    Memisevic, E., Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2017, (Unpublished)

    Research output: Contribution to conferencePaper, not in proceeding

  19. 2016
  20. High-frequency InGaAs tri-gate MOSFETs with fmax of 400 GHz

    Zota, C. B., F. Lindelöw, L. E. Wernersson & E. Lind, 2016 Oct 27, In : Electronics Letters. 52, 22, p. 1869-1871 3 p.

    Research output: Contribution to journalArticle

  21. High-Performance Lateral Nanowire InGaAs MOSFETs with Improved On-Current

    Zota, C. B., Lars Erik Wernersson & Erik Lind, 2016 Oct 1, In : IEEE Electron Device Letters. 37, 10, p. 1264-1267 4 p., 7552490

    Research output: Contribution to journalArticle

  22. InAs/GaSb vertical nanowire TFETs on Si for digital and analogue applications

    Memisevic, E., J. Svensson, E. Lind & L. E. Wernersson, 2016 Sep 27, 2016 IEEE Silicon Nanoelectronics Workshop, SNW 2016. Institute of Electrical and Electronics Engineers Inc., p. 154-155 2 p. 7578029

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  23. InGaAs nanowire MOSFETs with ION = 555 μa/μm at IOFF = 100 nA/μm and VDD = 0.5 v

    Zota, C. B., Fredrik Lindelöw, Lars Erik Wernersson & Erik Lind, 2016 Sep 21, 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016. Institute of Electrical and Electronics Engineers Inc., 7573418

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  24. High frequency III-V nanowire MOSFETs

    Erik Lind, 2016 Aug 25, In : Semiconductor Science and Technology. 31, 9, 093005

    Research output: Contribution to journalReview article

  25. Size-effects in indium gallium arsenide nanowire field-effect transistors

    Zota, C. B. & E. Lind, 2016 Aug 8, In : Applied Physics Letters. 109, 6, 063505

    Research output: Contribution to journalArticle

  26. Amplifier Design Using Vertical InAs Nanowire MOSFETs

    Jansson, K., Erik Lind & Lars Erik Wernersson, 2016 Jun 1, In : IEEE Transactions on Electron Devices. 63, 6, p. 2353-2359 7 p., 7465782

    Research output: Contribution to journalArticle

  27. Effect of Gate Voltage Stress on InGaAs MOSFET with HfO2 or Al2O3 Dielectric

    Roll, G., Mo, J., Erik Lind, Johansson, S. & Lars Erik Wernersson, 2016 Jun 1, In : IEEE Transactions on Device and Materials Reliability. 16, 2, p. 112-116 5 p., 7422103

    Research output: Contribution to journalArticle

  28. Low Trap Density in InAs/High-k Nanowire Gate Stacks with Optimized Growth and Doping Conditions

    Wu, J., Babadi, A. S., Jacobsson, D., Jovana Colvin, Sofie Yngman, Rainer Timm, Erik Lind & Lars Erik Wernersson, 2016 Apr 13, In : Nano Letters. 16, 4, p. 2418-2425 8 p.

    Research output: Contribution to journalArticle

  29. ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatment

    Shiri Babadi, A., Erik Lind & Lars Erik Wernersson, 2016 Mar 28, In : Applied Physics Letters. 108, 13, 132904

    Research output: Contribution to journalArticle

  30. Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si

    Berg, M., Persson, K-M., Olli-Pekka Kilpi, Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2016 Feb 16, Technical Digest - International Electron Devices Meeting, IEDM. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-February, 7409806

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  31. Single suspended InGaAs nanowire MOSFETs

    Zota, C. B., Lars Erik Wernersson & Erik Lind, 2016 Feb 16, In : Technical Digest - International Electron Devices Meeting, IEDM. p. 31.4.1-31.4.4

    Research output: Contribution to journalArticle

  32. Ballistic modeling of InAs nanowire transistors

    Jansson, K., Erik Lind & Lars-Erik Wernersson, 2016, In : Solid-State Electronics. 115, p. 47-53

    Research output: Contribution to journalArticle

  33. RF Characterization of Vertical Wrap-Gated InAs/High-κ Nanowire Capacitors

    Wu, J., Jansson, K., Shiri Babadi, A., Berg, M., Erik Lind & Lars-Erik Wernersson, 2016, In : IEEE Transactions on Electron Devices. 63, 2, p. 584-589

    Research output: Contribution to journalArticle

  34. 2015
  35. High Frequency InGaAs Nanowire MOSFETs

    E. Lind, 2015 Oct 30, 2015 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2015. Institute of Electrical and Electronics Engineers Inc., 7314508

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  36. Defect evaluation in InGaAs field effect transistors with HfO2 or Al2O3 dielectric

    Roll, G., Mo, J., Erik Lind, Johansson, S. & Lars-Erik Wernersson, 2015, In : Applied Physics Letters. 106, 20, 203503

    Research output: Contribution to journalArticle

  37. III-V Heterostructure Nanowire Tunnel FETs

    Erik Lind, Memisevic, E., Dey, A. & Lars-Erik Wernersson, 2015, In : IEEE Journal of the Electron Devices Society. 3, 3, p. 96-102

    Research output: Contribution to journalArticle

  38. InP Drain Engineering in Asymmetric InGaAs/InP MOSFETs

    Mo, J., Erik Lind & Lars-Erik Wernersson, 2015, In : IEEE Transactions on Electron Devices. 62, 2, p. 501-506

    Research output: Contribution to journalArticle

  39. Quantized Conduction and High Mobility in Selectively Grown InxGa1-xAs Nanowires

    Zota, C., Lindgren, D., Lars-Erik Wernersson & Erik Lind, 2015, In : ACS Nano. 9, 10, p. 9892-9897

    Research output: Contribution to journalArticle

  40. Vertical InAs/GaSb Nanowire Axial TFETs Integrated on Si-substrates

    Memisevic, E., Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2015, (Unpublished)

    Research output: Contribution to conferencePaper, not in proceeding

  41. 2014
  42. Asymmetric InGaAs/InP MOSFETs With Source/Drain Engineering

    Mo, J., Erik Lind & Lars-Erik Wernersson, 2014, In : IEEE Electron Device Letters. 35, 5, p. 515-517

    Research output: Contribution to journalArticle

  43. Asymmetric InGaAs MOSFETs with InGaAs source and InP drain

    Mo, J., Erik Lind & Lars-Erik Wernersson, 2014, 26th International Conference on Indium Phosphideand Related Materials (IPRM). IEEE--Institute of Electrical and Electronics Engineers Inc.

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  44. Design of Radial Nanowire Tunnel Field-Effect Transistors

    Dey, A., Erik Lind, Johannes Svensson, Ek, M., Thelander, C. & Lars-Erik Wernersson, 2014, 2014 72nd Annual Device Research Conference (DRC). IEEE--Institute of Electrical and Electronics Engineers Inc., p. 81-82

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  45. High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates

    Johansson, S., Memisevic, E., Lars-Erik Wernersson & Erik Lind, 2014, In : IEEE Electron Device Letters. 35, 5, p. 518-520

    Research output: Contribution to journalArticle

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