A 60 pJ/b 300 Mb/s 128 × 8 Massive MIMO Precoder-Detector in 28 nm FD-SOI

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Abstract

A 1.1 mm2 128x8 massive MIMO implementation evaluated with measured channel data is presented. A flexible pre-coding and detection framework with novel algorithm optimizations lead to 57% and 17% for up- and down-link area reduction over existing small-scale MIMO implementations. Circuit optimizations and the use of flexible FD-SOI body-bias resulted in measured energy of 6.56 nJ/QRD and 60 pJ/b at 300 Mb/s detection rate.

Details

Authors
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Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Signal Processing
  • Other Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • Massive MIMO, ASIC implementation
Original languageEnglish
Title of host publicationInternational Solid-State Circuits Conference (ISSCC)
Place of PublicationSan Francisco, CA
PublisherIEEE--Institute of Electrical and Electronics Engineers Inc.
Number of pages2
StateAccepted/In press - 2017 Feb 3
Peer-reviewedYes