A 90 nm CMOS 10 GHz beam forming transmitter

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding


A 10 GHz beam forming transmitter was designed in a 90 nm CMOS process. Two power amplifiers with independently controllable phase enable the beam forming. The controllable phase is accomplished by switching in binary weighted transistors fed by quadrature signals, which are generated by a quadrature voltage controlled oscillator followed by a buffer. The design contains seven differential on-chip inductors, and consumes a total of 44.0 mA from a 1.2 V supply. The desired output power of 5 dBm per power amplifier is delivered at a power added efficiency of 22 % for the power amplifier


Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Electrical Engineering, Electronic Engineering, Information Engineering


  • beam forming transmitter, CMOS process, power added efficiency, 44.0 mA, 90 nm, 10 GHz, quadrature signal, 1.2 V, on-chip inductor, quadrature voltage controlled oscillator, controllable phase, buffer, binary weighted transistor, power amplifier
Original languageEnglish
Title of host publicationISSCS 2005. International Symposium on Signals, Circuits and Systems
PublisherIEEE--Institute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Print)0-7803-9029-6
StatePublished - 2005
Publication categoryResearch
EventISSCS 2005. International Symposium on Signals, Circuits and Systems - Iasi, Romania
Duration: 2005 Jul 142005 Jul 15


ConferenceISSCS 2005. International Symposium on Signals, Circuits and Systems

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