Research output per year
Research output per year
Personal profile
Research
Lars Fhager (previously Ohlsson Fhager, Ohlsson) received the MSc degree in engineering nanoscience and the PhD degree in electrical engineering from Lund University, Lund, Sweden, in 2010 and 2015, respectively, where he is currently associate senior lecturer with the Department of Electrical and Information Technology.
He studies wideband design techniques and development of III-V transistor technologies for integrated transceiver circuits.
He further explores pulse-based communication, device modelling, and radar imaging.
His research interests include millimetre-wave and sub-teratertz circuit design, high-speed device technologies, pulse generator circuits, device characterisation, and pulse-based radio systems.
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
UKÄ subject classification
- Condensed Matter Physics
- Nano Technology
- Telecommunications
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Collaborations the last five years
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Research output
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A 29.5 GHz Rectifier with 14.5 dB Dynamic Power Range for Energy Harvester Using Vertical Nanowire Tunnel FETs
Au, N. D., Sandberg, M. E., Rangasamy, G., Fhager, L. O. & Wernersson, L. E., 2024, 2024 19th European Microwave Integrated Circuits Conference, EuMIC 2024. IEEE - Institute of Electrical and Electronics Engineers Inc., p. 415-418 4 p.Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review
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RF Characterization of Ferroelectric MOS Capacitors
Persson, A. E. O., Andric, S., Fhager, L. & Wernersson, L. E., 2024, In: IEEE Electron Device Letters. 45, 9, p. 1653-1656 4 p.Research output: Contribution to journal › Article › peer-review
Open Access -
TFET Circuit Configurations Operating below 60 mV/dec
Rangasamy, G., Zhu, Z., Fhager, L. O. & Wernersson, L. E., 2024, In: IEEE Transactions on Nanotechnology. 23, p. 441-447 8 p.Research output: Contribution to journal › Article › peer-review
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gm/Id Analysis of vertical nanowire III–V TFETs
Rangasamy, G., Zhu, Z., Ohlsson Fhager, L. & Wernersson, L.-E., 2023 Sept 18, In: Electronics Letters. 59, 18Research output: Contribution to journal › Article › peer-review
Open Access -
Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
Rangasamy, G., Ram, M. S., Fhager, L. O. & Wernersson, L. E., 2023 Jul 1, In: IEEE Electron Device Letters. 44, 7, p. 1212-1215 4 p.Research output: Contribution to journal › Article › peer-review
Projects
- 2 Finished
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SEQUENCE: Cryogenic 3D Nanoelectronics (Sense and Readout Electronics Cryogenically Integrated for QUantum ENhanced Computation and Evolving Communication)
Svensson, J. (Administrator), Borg, M. (Researcher), Fhager, L. (Administrator), Lind, E. (CoPI), Wernersson, L.-E. (Project coordinator) & Södergren, L. (Research student)
2020/01/01 → 2023/12/31
Project: Research
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INSIGHT: Integration of III-V Nanowire Semiconductors for next Generation High Performance CMOS SOC Technologies
Wernersson, L.-E. (Project coordinator), Borg, M. (Administrator), Svensson, J. (Researcher), Zota, C. (Research student), Lindelöw, F. (Research student), Jönsson, A. (Research student), Lind, E. (Researcher), Kilpi, O.-P. (Research student), Fhager, L. (Researcher), Andric, S. (Research student) & Hellenbrand, M. (PI)
2015/12/01 → 2019/05/31
Project: Research