60 GHz Second Harmonic Power Amplifiers in 130-nm CMOS

Johan Wernehag, Henrik Sjöland

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Abstract

Abstract—Two different frequency doubling power amplifiers have been measured, one with differential and one with single-ended input, both with single-ended output at 60 GHz. The amplifiers have been implemented in a 1p8M 130-nm CMOS process. The resonant nodes are tuned to 30 GHz or 60 GHz using on-chip transmission lines, which have been simulated in ADS and Momentum.

The measured input impedance of the single-ended PA is high at 250 Ω, and the differential input is similar, making the PA a suitable load for an oscillator in a fully integrated transmitter. The single-ended and differential input PA delivers 1 dBm and 3 dBm, respectively, of measured saturated output power to 50 Ω, both with a drain efficiency of 8%
Original languageEnglish
Title of host publicationProceedings of Swedish System-on-Chip Conference (SSoCC)
Pages1-4
Number of pages4
Publication statusPublished - 2008
EventSwedish System-on-Chip Conference 2008 (SSoCC’08) - Gnesta, Gnesta, Sweden
Duration: 2008 May 52008 May 6

Conference

ConferenceSwedish System-on-Chip Conference 2008 (SSoCC’08)
Country/TerritorySweden
CityGnesta
Period2008/05/052008/05/06

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

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