A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS

Andreas Axholt; Filip Oredsson; Tony Petersson; Johan Wernehag; Henrik Sjöland

doi:10.1109/NORCHP.2007.4481036

A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS

Andreas Axholt, Filip Oredsson, Tony Petersson, Johan Wernehag, Henrik Sjöland

Department of Electrical and Information Technology

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.

Original language	English
Title of host publication	[Host publication title missing]
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	46-49
Number of pages	4
ISBN (Print)	978-1-4244-1516-8
DOIs	https://doi.org/10.1109/NORCHP.2007.4481036
Publication status	Published - 2007
Event	Norchip conference, 2007 - Aalborg, Denmark Duration: 2007 Nov 19 → 2007 Nov 20

Conference

Conference	Norchip conference, 2007
Country/Territory	Denmark
City	Aalborg
Period	2007/11/19 → 2007/11/20

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Access to Document

10.1109/NORCHP.2007.4481036

Cite this

@inproceedings{0b1c29bcdc0f46a48553731ae191ee19,

title = "A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS",

abstract = "A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.",

author = "Andreas Axholt and Filip Oredsson and Tony Petersson and Johan Wernehag and Henrik Sj{\"o}land",

year = "2007",

doi = "10.1109/NORCHP.2007.4481036",

language = "English",

isbn = "978-1-4244-1516-8",

pages = "46--49",

booktitle = "[Host publication title missing]",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "Norchip conference, 2007 ; Conference date: 19-11-2007 Through 20-11-2007",

}

TY - GEN

T1 - A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS

AU - Axholt, Andreas

AU - Oredsson, Filip

AU - Petersson, Tony

AU - Wernehag, Johan

AU - Sjöland, Henrik

PY - 2007

Y1 - 2007

N2 - A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.

AB - A fully integrated class-D audio power amplifier using Pulse Width Modulation (PWM) technique is presented. The output stage is an H-bridge with 5.75 min wide nMOS transistors and 15 min wide pMOS transistors, which can deliver up to 0.25 W-rms to an 16 ohm load. The chip measuring 1.2x2.4 mm(2), including pads, was fabricated in a 0.35 mu m CMOS process. It uses a single 3.3 V supply and a PWM carrier frequency of 2.5 MHz. The chip was designed and simulated with Cadence IC design tools as a student project in the course IC-project and verification at Lund University. The chip was verified and works well with a measured THD+N of 0.5% and efficiency of 76% at 0.25 W-rms output power into 16 ohm.

U2 - 10.1109/NORCHP.2007.4481036

DO - 10.1109/NORCHP.2007.4481036

M3 - Paper in conference proceeding

SN - 978-1-4244-1516-8

SP - 46

EP - 49

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - Norchip conference, 2007

Y2 - 19 November 2007 through 20 November 2007

ER -

A 0.25W fully integrated class-d audio power amplifier in 0.35um CMOS

Abstract

Conference

Subject classification (UKÄ)

Access to Document

Fingerprint

Cite this