Abstract
A 24 GHz 2-path beamforming receiver front-end
in 90 nm CMOS is presented. It consists of two direct conversion
front-ends followed by a baseband block performing phase
rotation and signal combination. The baseband phase rotation
is performed by combining the quadrature phases using digitally
controlled weights, achieving a phase resolution of 11 degrees.
From each of the two inputs the front-end measures; a conversion
gain of 13 dB, NF < 9 dB, ICP1db = -20.5dBm, IIP3 = -7.5dBm,
LO-RF isolation 48dB, all at a power consumption of 33.6mW
from a 1.2 V supply. The chip area is 1400x850 μm2, including
pads, of which the phase rotation block occupies 400x100 μm2.
in 90 nm CMOS is presented. It consists of two direct conversion
front-ends followed by a baseband block performing phase
rotation and signal combination. The baseband phase rotation
is performed by combining the quadrature phases using digitally
controlled weights, achieving a phase resolution of 11 degrees.
From each of the two inputs the front-end measures; a conversion
gain of 13 dB, NF < 9 dB, ICP1db = -20.5dBm, IIP3 = -7.5dBm,
LO-RF isolation 48dB, all at a power consumption of 33.6mW
from a 1.2 V supply. The chip area is 1400x850 μm2, including
pads, of which the phase rotation block occupies 400x100 μm2.
| Original language | English |
|---|---|
| Number of pages | 4 |
| Publication status | Published - 2010 |
| Event | European Solid-State Circuits Conference (ESSCIRC), 2010 - Sevilla, Spain Duration: 2010 Sept 13 → 2010 Sept 17 Conference number: 36 |
Conference
| Conference | European Solid-State Circuits Conference (ESSCIRC), 2010 |
|---|---|
| Country/Territory | Spain |
| City | Sevilla |
| Period | 2010/09/13 → 2010/09/17 |
Subject classification (UKÄ)
- Electrical Engineering, Electronic Engineering, Information Engineering