A 2.4 GHz CMOS power amplifier using internal frequency doubling

Pieternella Cijvat, Niklas Troedsson, Henrik Sjöland

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingResearchpeer-review

2 Citations (SciVal)
115 Downloads (Pure)

Abstract

A fully integrated 0.18 μm 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz
Original languageEnglish
Title of host publication2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages2683-2686
ISBN (Print)0-7803-8834-8
DOIs
Publication statusPublished - 2005
EventIEEE International Symposium on Circuits and Systems (ISCAS), 2005 - Kobe, Japan
Duration: 2005 May 232005 May 26

Conference

ConferenceIEEE International Symposium on Circuits and Systems (ISCAS), 2005
Country/TerritoryJapan
CityKobe
Period2005/05/232005/05/26

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • output power
  • drain efficiency
  • CMOS power amplifier
  • oscillator pulling
  • VCO
  • low-IF upconversion
  • direct-upconversion
  • internal frequency doubling
  • 2.4 GHz
  • 0.18 micron

Fingerprint

Dive into the research topics of 'A 2.4 GHz CMOS power amplifier using internal frequency doubling'. Together they form a unique fingerprint.

Cite this