A custom image convolution DSP with a sustained calculation capacity of >1 GMAC/s and low I/O bandwidth

Viktor Öwall, Mats Torkelson, Peter Egelberg

Research output: Contribution to journalArticlepeer-review

Abstract

A customized processor for real time image convolution has been designed to increase the performance of an instrument for automated cereal grain quality assessment. Image convolution requires an extensive amount of calculation capacity and a corresponding amount of data transfers, hard to achieve with standard processors in real time. Therefore, a tailored architecture with a streamlined dataflow has been developed with emphasis on a system design perspective. The designed processor has a sustained calculation capacity of >1 GMAC/s and on-chip line buffers reduce the amount of external data transfers. Hence, the complexity of the designed processor has been increased to gain a lower complexity of the complete system. To achieve powerful and versatile filtering the size of the programmable kernel functions have been maximized to 15 × 15.
Original languageEnglish
Pages (from-to)335-349
JournalJournal of VLSI Signal Processing
Volume23
Issue number2-3
DOIs
Publication statusPublished - 1999

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

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