A differential difference comparator for multi-step A/D converters

Gang Xu, Jiren Yuan

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

Abstract

The proposed Differential Difference Comparator (DDC) provides easy linear voltage summing/subtraction and comparison functions via current operation. The speed of this unconventional comparator drastically improved since there is no feedback loop and coupling capacitors needed to maintain the linearity. The linear input range is also enlarged by the common mode compression. The principle, design considerations and simulation results are presented based on a comparator used in an 8 bit 2-step A/D converter over 100 MS/s.
Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages257-260
Volume1
Publication statusPublished - 2003
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 2003 May 252003 May 28

Publication series

Name
Volume1
ISSN (Print)0271-4310
ISSN (Electronic)2158-1525

Conference

ConferenceProceedings of the 2003 IEEE International Symposium on Circuits and Systems
Country/TerritoryThailand
CityBangkok
Period2003/05/252003/05/28

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • Differential difference comparators (DDC)

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