A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures

Chenxin Zhang; Liang Liu; Yian Wang; Meifang Zhu; Ove Edfors; Viktor Öwall

doi:10.1109/WCNC.2013.6555188

A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures

Chenxin Zhang, Liang Liu, Yian Wang, Meifang Zhu, Ove Edfors, Viktor Öwall

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

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Abstract

This paper presents a highly parallelized MIMO signal detection algorithm targeting vector-based reconfigurable architectures. The detector achieves high data-level parallelism and near-ML performance by adopting a vector-architecture-friendly technique - parallel node perturbation. To further reduce the computational complexity, imbalanced node and successive partial node expansion schemes in conjunction with sorted QR decomposition are applied. The effectiveness of the proposed algorithm is evaluated by simulations performed on a simplified 4x4 MIMO LTE-A testbed and operation analysis. Compared to the K-Best detector and fixed-complexity sphere decoder (FSD), the number of visited nodes in the proposed algorithm is reduced by 15 and 1.9 times respectively, with less than 1dB performance degradation. Benefiting from the fully deterministic non-iterative dataflow structure, reconfiguration rate is 95% less than that of the K-Best detector and 17% less than the case of FSD.

Original language	English
Title of host publication	[Host publication title missing]
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	3844-3849
Number of pages	6
DOIs	https://doi.org/10.1109/WCNC.2013.6555188
Publication status	Published - 2013
Event	IEEE Wireless Communications and Networking Conference (WCNC), 2013 - Shanghai, China Duration: 2013 Apr 7 → 2013 Apr 10

Conference

Conference	IEEE Wireless Communications and Networking Conference (WCNC), 2013
Country/Territory	China
City	Shanghai
Period	2013/04/07 → 2013/04/10

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

MIMO
signal detection
vector processor
data parallelization

Access to Document

10.1109/WCNC.2013.6555188

MIMO_Det_WCNC2013

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6555188&tag=1

HiPEC: High Performance Embedded Computing
Gruian, F., Kuchcinski, K., Janneck, J., Arslan, M. A., Mirza, U. M., Zhang, C., Cedersjö, G., Prabhu, H., Liu, L., Zhu, M., Liu, Y., Edfors, O. & Öwall, V.
Swedish Foundation for Strategic Research, SSF
2011/01/01 → 2015/12/31
Project: Research

Cite this

@inproceedings{5ec50c198da448d2bb62a716ee62ef5a,

title = "A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures",

abstract = "This paper presents a highly parallelized MIMO signal detection algorithm targeting vector-based reconfigurable architectures. The detector achieves high data-level parallelism and near-ML performance by adopting a vector-architecture-friendly technique - parallel node perturbation. To further reduce the computational complexity, imbalanced node and successive partial node expansion schemes in conjunction with sorted QR decomposition are applied. The effectiveness of the proposed algorithm is evaluated by simulations performed on a simplified 4x4 MIMO LTE-A testbed and operation analysis. Compared to the K-Best detector and fixed-complexity sphere decoder (FSD), the number of visited nodes in the proposed algorithm is reduced by 15 and 1.9 times respectively, with less than 1dB performance degradation. Benefiting from the fully deterministic non-iterative dataflow structure, reconfiguration rate is 95% less than that of the K-Best detector and 17% less than the case of FSD.",

keywords = "MIMO, signal detection, vector processor, data parallelization",

author = "Chenxin Zhang and Liang Liu and Yian Wang and Meifang Zhu and Ove Edfors and Viktor {\"O}wall",

year = "2013",

doi = "10.1109/WCNC.2013.6555188",

language = "English",

pages = "3844--3849",

booktitle = "[Host publication title missing]",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "IEEE Wireless Communications and Networking Conference (WCNC), 2013 ; Conference date: 07-04-2013 Through 10-04-2013",

}

Zhang, C, Liu, L, Wang, Y, Zhu, M, Edfors, O & Öwall, V 2013, A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures. in [Host publication title missing]. IEEE - Institute of Electrical and Electronics Engineers Inc., pp. 3844-3849, IEEE Wireless Communications and Networking Conference (WCNC), 2013, Shanghai, China, 2013/04/07. https://doi.org/10.1109/WCNC.2013.6555188

TY - GEN

T1 - A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures

AU - Zhang, Chenxin

AU - Liu, Liang

AU - Wang, Yian

AU - Zhu, Meifang

AU - Edfors, Ove

AU - Öwall, Viktor

PY - 2013

Y1 - 2013

N2 - This paper presents a highly parallelized MIMO signal detection algorithm targeting vector-based reconfigurable architectures. The detector achieves high data-level parallelism and near-ML performance by adopting a vector-architecture-friendly technique - parallel node perturbation. To further reduce the computational complexity, imbalanced node and successive partial node expansion schemes in conjunction with sorted QR decomposition are applied. The effectiveness of the proposed algorithm is evaluated by simulations performed on a simplified 4x4 MIMO LTE-A testbed and operation analysis. Compared to the K-Best detector and fixed-complexity sphere decoder (FSD), the number of visited nodes in the proposed algorithm is reduced by 15 and 1.9 times respectively, with less than 1dB performance degradation. Benefiting from the fully deterministic non-iterative dataflow structure, reconfiguration rate is 95% less than that of the K-Best detector and 17% less than the case of FSD.

AB - This paper presents a highly parallelized MIMO signal detection algorithm targeting vector-based reconfigurable architectures. The detector achieves high data-level parallelism and near-ML performance by adopting a vector-architecture-friendly technique - parallel node perturbation. To further reduce the computational complexity, imbalanced node and successive partial node expansion schemes in conjunction with sorted QR decomposition are applied. The effectiveness of the proposed algorithm is evaluated by simulations performed on a simplified 4x4 MIMO LTE-A testbed and operation analysis. Compared to the K-Best detector and fixed-complexity sphere decoder (FSD), the number of visited nodes in the proposed algorithm is reduced by 15 and 1.9 times respectively, with less than 1dB performance degradation. Benefiting from the fully deterministic non-iterative dataflow structure, reconfiguration rate is 95% less than that of the K-Best detector and 17% less than the case of FSD.

KW - MIMO

KW - signal detection

KW - vector processor

KW - data parallelization

U2 - 10.1109/WCNC.2013.6555188

DO - 10.1109/WCNC.2013.6555188

M3 - Paper in conference proceeding

SP - 3844

EP - 3849

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE Wireless Communications and Networking Conference (WCNC), 2013

Y2 - 7 April 2013 through 10 April 2013

ER -

A Highly Parallelized MIMO Detector for Vector-Based Reconfigurable Architectures

Abstract

Conference

Subject classification (UKÄ)

Keywords

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Projects

HiPEC: High Performance Embedded Computing

Cite this