A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS

Anders Nejdel; Markus Törmänen; Henrik Sjöland

doi:10.1109/RFIC.2014.6851651

A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS

Anders Nejdel, Markus Törmänen, Henrik Sjöland

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

This paper presents a noise cancelling 0.7–
3.8GHz receiver front-end implemented in 65nm technology.
The circuit has a main path consisting of a high input
impedance gm-stage, current-mode passive mixers and baseband
amplifiers, where the input match is provided by frequency
translational negative feedback from baseband to RF
input. An auxiliary path with tunable gain is introduced to
cancel noise from the main path while maintaining linearity.
The receiver front-end achieves a noise figure of 1.6–3.7dB
and an IIP2 and IIP3 of >75dBm and >1dBm, respectively.
The current consumption of the circuit is 22.8–34.9mA, from
a 1.2V supply.

Original language	English
Title of host publication	[Host publication title missing]
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	35-38
DOIs	https://doi.org/10.1109/RFIC.2014.6851651
Publication status	Published - 2014
Event	IEEE Radio Frequency Integrated Circuits 2014 - Tampa, United States Duration: 2014 Jun 1 → …

Publication series

Name
ISSN (Print)	1529-2517

Conference

Conference	IEEE Radio Frequency Integrated Circuits 2014
Country/Territory	United States
City	Tampa
Period	2014/06/01 → …

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

Analog integrated circuits
CMOS integrated circuits
Current mode circuits
Low-noise amplifiers
Mixers
Radiofrequency integrated circuits.

Access to Document

10.1109/RFIC.2014.6851651

Cite this

@inproceedings{bb1861b19a8241df87921e420422b98a,

title = "A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS",

abstract = "This paper presents a noise cancelling 0.7– 3.8GHz receiver front-end implemented in 65nm technology. The circuit has a main path consisting of a high input impedance gm-stage, current-mode passive mixers and baseband amplifiers, where the input match is provided by frequency translational negative feedback from baseband to RF input. An auxiliary path with tunable gain is introduced to cancel noise from the main path while maintaining linearity. The receiver front-end achieves a noise figure of 1.6–3.7dB and an IIP2 and IIP3 of >75dBm and >1dBm, respectively. The current consumption of the circuit is 22.8–34.9mA, from a 1.2V supply.",

keywords = "Analog integrated circuits, CMOS integrated circuits, Current mode circuits, Low-noise amplifiers, Mixers, Radiofrequency integrated circuits.",

author = "Anders Nejdel and Markus T{\"o}rm{\"a}nen and Henrik Sj{\"o}land",

year = "2014",

doi = "10.1109/RFIC.2014.6851651",

language = "English",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

pages = "35--38",

booktitle = "[Host publication title missing]",

address = "United States",

note = "IEEE Radio Frequency Integrated Circuits 2014 ; Conference date: 01-06-2014",

}

TY - GEN

T1 - A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS

AU - Nejdel, Anders

AU - Törmänen, Markus

AU - Sjöland, Henrik

PY - 2014

Y1 - 2014

N2 - This paper presents a noise cancelling 0.7– 3.8GHz receiver front-end implemented in 65nm technology. The circuit has a main path consisting of a high input impedance gm-stage, current-mode passive mixers and baseband amplifiers, where the input match is provided by frequency translational negative feedback from baseband to RF input. An auxiliary path with tunable gain is introduced to cancel noise from the main path while maintaining linearity. The receiver front-end achieves a noise figure of 1.6–3.7dB and an IIP2 and IIP3 of >75dBm and >1dBm, respectively. The current consumption of the circuit is 22.8–34.9mA, from a 1.2V supply.

AB - This paper presents a noise cancelling 0.7– 3.8GHz receiver front-end implemented in 65nm technology. The circuit has a main path consisting of a high input impedance gm-stage, current-mode passive mixers and baseband amplifiers, where the input match is provided by frequency translational negative feedback from baseband to RF input. An auxiliary path with tunable gain is introduced to cancel noise from the main path while maintaining linearity. The receiver front-end achieves a noise figure of 1.6–3.7dB and an IIP2 and IIP3 of >75dBm and >1dBm, respectively. The current consumption of the circuit is 22.8–34.9mA, from a 1.2V supply.

KW - Analog integrated circuits

KW - CMOS integrated circuits

KW - Current mode circuits

KW - Low-noise amplifiers

KW - Mixers

KW - Radiofrequency integrated circuits.

U2 - 10.1109/RFIC.2014.6851651

DO - 10.1109/RFIC.2014.6851651

M3 - Paper in conference proceeding

SP - 35

EP - 38

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE Radio Frequency Integrated Circuits 2014

Y2 - 1 June 2014

ER -

A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS

Abstract

Publication series

Conference

Subject classification (UKÄ)

Free keywords

Access to Document

Fingerprint

Cite this