A three bit second order audio band delta sigma modulator with 98.2dB SQNR

Henrik Felding, Linus Hellman, Siyu Tan, Markus Törmänen

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

Abstract

A three bit second order delta sigma modulator for audio applications implemented in 130nm CMOS technology is presented. The modulator features two integrators, a flash quantizer and two current steering DACs. In order to minimize the effect of delays in the DACs, excessive loop delay (ELD) compensation is utilized. Using an oversampling ratio (OSR) of 80, the design consumes 2.8mW and achieves a simulated signal to quantization noise ratio (SQNR) of 98.2dB. The chip area is minimized by decreasing the number of digital to analog converters (DACs) by using the concept of partial integration. The compact design occupies an active core area of 630μm × 600μm.
Original languageEnglish
Title of host publication2016 International Symposium on Integrated Circuits, ISIC 2016
Place of PublicationSingapore
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)978-146739019-4
DOIs
Publication statusPublished - 2016 Dec 14

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

  • Delta Sigma modulation
  • Partial Integration
  • Excessive Loop Delay
  • Analogue to Digital conversion

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