An all-digital ΣΔ--frequency discriminator of arbitrary order

E Atalla; E Hegazi; Henrik Sjöland; M Ibrahim

doi:10.1109/ISCAS.2006.1693752

An all-digital ΣΔ--frequency discriminator of arbitrary order

E Atalla, E Hegazi, Henrik Sjöland, M Ibrahim

Department of Electrical and Information Technology

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

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Abstract

In this paper, we propose an all-digital frequency synthesizer architecture, based on an all-digital ΣΔ-frequency discriminator. The new all-digital synthesizer is compared to previously published work. The architecture of the ΣΔ-frequency discriminator is verified using behavioral simulation.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems, ISCAS 2006. Proceedings.
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2006.1693752
Publication status	Published - 2006

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

Synthesizer architecture
Digital frequency
Natural frequencies
Frequency synthesizers
Computer simulation
Frequency discriminator

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10.1109/ISCAS.2006.1693752

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title = "An all-digital ΣΔ--frequency discriminator of arbitrary order",

abstract = "In this paper, we propose an all-digital frequency synthesizer architecture, based on an all-digital ΣΔ-frequency discriminator. The new all-digital synthesizer is compared to previously published work. The architecture of the ΣΔ-frequency discriminator is verified using behavioral simulation.",

keywords = "Synthesizer architecture, Digital frequency, Natural frequencies, Frequency synthesizers, Computer simulation, Frequency discriminator",

author = "E Atalla and E Hegazi and Henrik Sj{\"o}land and M Ibrahim",

year = "2006",

doi = "10.1109/ISCAS.2006.1693752",

language = "English",

isbn = "0-7803-9389-9",

booktitle = "IEEE International Symposium on Circuits and Systems, ISCAS 2006. Proceedings.",

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AU - Atalla, E

AU - Hegazi, E

AU - Sjöland, Henrik

AU - Ibrahim, M

PY - 2006

Y1 - 2006

N2 - In this paper, we propose an all-digital frequency synthesizer architecture, based on an all-digital ΣΔ-frequency discriminator. The new all-digital synthesizer is compared to previously published work. The architecture of the ΣΔ-frequency discriminator is verified using behavioral simulation.

AB - In this paper, we propose an all-digital frequency synthesizer architecture, based on an all-digital ΣΔ-frequency discriminator. The new all-digital synthesizer is compared to previously published work. The architecture of the ΣΔ-frequency discriminator is verified using behavioral simulation.

KW - Synthesizer architecture

KW - Digital frequency

KW - Natural frequencies

KW - Frequency synthesizers

KW - Computer simulation

KW - Frequency discriminator

UR - https://www.scopus.com/pages/publications/34547275031

U2 - 10.1109/ISCAS.2006.1693752

DO - 10.1109/ISCAS.2006.1693752

M3 - Paper in conference proceeding

SN - 0-7803-9389-9

BT - IEEE International Symposium on Circuits and Systems, ISCAS 2006. Proceedings.

ER -

An all-digital ΣΔ--frequency discriminator of arbitrary order

Abstract

Subject classification (UKÄ)

Free keywords

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