@inproceedings{6225d4d6c60e42f1a9f63fc68d388f67,
title = "An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average",
abstract = "A multiphase clock generator based on direct phase interpolation is presented. No feedback loop is required. A simple phase interpolation architecture is proposed, in which the two phase-adjacent signals are interpolated by using a series of resistors via inverters' discharging or charging slopes to generate multiphase outputs in a single stage. A phase error averaging circuit is used to correct interphase errors. The multiphase clock generator has been fabricated in a standard 0.35 μm, 3.3 V CMOS process. The measured performance shows it can operate at the input clock frequencies from 300 MHz to 600 MHz and has the rms jitter of 6 ps at 500 MHz.",
keywords = "Multiphase clock generators",
author = "Yang Lixin and Jiren Yuan",
year = "2003",
doi = "10.1109/ISCAS.2003.1205646",
language = "English",
volume = "1",
publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",
pages = "645--648",
booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems",
address = "United States",
note = "Proceedings of the 2003 IEEE International Symposium on Circuits and Systems ; Conference date: 25-05-2003 Through 28-05-2003",
}