@inproceedings{f342842ee5e04afe8c2fd84d48994ee2,
title = "Analysis and design of an 1-20 GHz track and hold circuit",
abstract = "This work analyzes the nonlinear effects in the track and hold circuit applied in high-speed ADCs or RF sampling receiver (RX) front-ends. Non-ideal effects inside the main sampling NMOS switch are studied. Parasitic varactor and sampling on-resistance modulation effects are analyzed through frequency domain Volterra series and the EKV MOS transistor model. Polynomial curve fitting is applied showing that the on-resistance modulation dominates. Finally, a novel bootstrap circuit is proposed with a fast settling time and high bootstrap voltage in a 22 nm FD-SOI CMOS technology, with its settling time analyzed using the Elmore delay model.",
author = "Peng Chen and Stefan Andersson and Gunnarsson, {Sten E.} and Henrik Sj{\"o}land",
year = "2021",
doi = "10.1109/ISCAS51556.2021.9401599",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings",
address = "United States",
note = "53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 ; Conference date: 22-05-2021 Through 28-05-2021",
}