Abstract
For mobile communication systems in the low-GHz range, CMOS has increasingly become the technology of choice, and the level of integration in mobile handsets has risen. The use of off-chip components, which increases the handset assembly time and costs, is preferably avoided. However, integrating a complete transceiver on a single chip leads to disturbances between building blocks. This imposes new and more stringent requirements on building block and transceiver performance, as well as impacts the choice of transceiver architecture.
In the general introduction, an overview is given of front-end receiver and transmitter aspects as well as RF CMOS technology. This includes the impact of mobile communication system specifications on architectures and building blocks, transistor and monolithic inductor modeling, and disturbance issues. Special attention is given to power amplifiers, the most challenging building blocks in CMOS transceivers. Papers I, II and III address CMOS receiver front-end aspects and implementations, while in papers IV and V design and challenges of CMOS power amplifiers are described.
In the general introduction, an overview is given of front-end receiver and transmitter aspects as well as RF CMOS technology. This includes the impact of mobile communication system specifications on architectures and building blocks, transistor and monolithic inductor modeling, and disturbance issues. Special attention is given to power amplifiers, the most challenging building blocks in CMOS transceivers. Papers I, II and III address CMOS receiver front-end aspects and implementations, while in papers IV and V design and challenges of CMOS power amplifiers are described.
Original language | English |
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Qualification | Doctor |
Awarding Institution |
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Supervisors/Advisors |
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Award date | 2004 Dec 9 |
Publisher | |
Publication status | Published - 2004 |
Bibliographical note
Defence detailsDate: 2004-12-09
Time: 10:15
Place: Room E:1406 in E-building, Ole Römers Väg 3, Lund Institute of Technology
External reviewer(s)
Name: Andreani, Pietro
Title: Prof
Affiliation: Denmark
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Article: E. Cijvat, "A 0.35 um CMOS DCS Front-end with Fully Integrated VCO", in Proceedings of the 8th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2001), Malta, 2001, pp. 1595-1598.
Article: S. Tadjpour, E. Cijvat, E. Hegazi and A. Abidi, "A 900 MHz Dual Conversion, Low-IF GSM Receiver in 0.35 um CMOS", IEEE Journal of Solid-State Circuits, Vol. 36, No.12, pp. 1992 - 2002, Dec. 2001.
Article: E. Cijvat, S. Tadjpour and A.A. Abidi, "Spurious mixing of off-channel signals in a wireless receiver and the choice of IF", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 49, No. 8, pp. 539 - 544, Aug. 2002.
Article: E. Cijvat and H. Sjöland, "A Fully Integrated 2.45 GHz 0.25 um CMOS Power Amplifier", in Proceedings of the 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), United Arab Emirates, 2003, pp. 1094-1097.
Article: E. Cijvat, N. Troedsson and H. Sjöland, "A Fully Integrated CMOS RF Power Amplifier with Internal Frequency Doubling", submitted to Analog Integrated Circuits and Signal Processing.
Subject classification (UKÄ)
- Electrical Engineering, Electronic Engineering, Information Engineering
Free keywords
- RF CMOS
- Wireless Communication
- Receiver
- Transmitter
- Power Amplifier
- Harmonic Distortion
- Electrical engineering
- Elektroteknik
- Telecommunication engineering
- Telekommunikationsteknik