Coarse grain clock gating of streaming applications in programmable logic implementations

Endri Bezati, Simone Casale Brunet, Marco Mattavelli, Jörn Janneck

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

12 Citations (SciVal)
Original languageEnglish
Title of host publication[Host publication title missing]
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages1-6
ISBN (Print)979-10-92279-00-9
DOIs
Publication statusPublished - 2014
EventElectronic System Level Synthesis Conference (ESLsyn) - San Francisco, United States
Duration: 2014 May 312015 Jun 1

Conference

ConferenceElectronic System Level Synthesis Conference (ESLsyn)
Country/TerritoryUnited States
CitySan Francisco
Period2014/05/312015/06/01

Subject classification (UKÄ)

  • Computer Science

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