Abstract

In this paper, we present a novel algorithmic and hardware co-design approach specifically tailored for efficient 2D convolution implementations, a crucial operation in convolutional neural networks (CNNs). Our method addresses the limitations of existing software-based solutions and hardware-based architectures, delivering significant improvements in asymptotic behavior for generic convolution cases. By leveraging the distinctive geometry of doubly block circulant unrolled kernel matrices, our approach eliminates the need for input and weight buffers, optimizes output memory usage, and minimizes redundant memory accesses. A comprehensive comparative analysis with state-of-the-art techniques showcases the key advantages and superior performance of our proposed method, achieving substantial reductions in memory requirements and high throughput.

Original languageEnglish
Title of host publication2023 IEEE 66th International Midwest Symposium on Circuits and Systems, MWSCAS 2023
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages236-240
Number of pages5
ISBN (Electronic)9798350302103
DOIs
Publication statusPublished - 2023
Event2023 IEEE 66th International Midwest Symposium on Circuits and Systems, MWSCAS 2023 - Tempe, United States
Duration: 2023 Aug 62023 Aug 9

Conference

Conference2023 IEEE 66th International Midwest Symposium on Circuits and Systems, MWSCAS 2023
Country/TerritoryUnited States
CityTempe
Period2023/08/062023/08/09

Subject classification (UKÄ)

  • Computer Vision and Robotics (Autonomous Systems)

Free keywords

  • 2D Convolution
  • Doubly-Blocked Circulant Matrix
  • Systolic Array
  • Unrolled Kernel Matrix

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