Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs

Markus Hellenbrand, Erik Lind, Olli-Pekka Kilpi, Lars-Erik Wernersson

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Abstract

We present a detailed study of the effect of gate-oxide-related defects (traps) on the small-signal radio frequency (RF) response of III-V nanowire MOSFETs and find that the effects are clearly identifiable in the measured admittance parameters and in important design parameters such as h21 (forward current gain) and MSG (maximum stable gain). We include the identified effects in a small-signal model alongside results from previous investigations of III-V RF MOSFETs and thus provide a comprehensive physical small-signal RF model for this type of transistor, which accurately describes the measured admittance parameters and gains. We verify the physical basis of the model assumptions by calculating the oxide defect density from the measured admittances.
Original languageEnglish
Article number107840
JournalSolid-State Electronics
Volume171
DOIs
Publication statusPublished - 2020

Subject classification (UKÄ)

  • Nano-technology

Free keywords

  • Border Traps
  • Gate Oxide Defects
  • Interface Defects
  • III-V
  • MOSFET
  • RF
  • Small-Signal Model

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