Ferroelectric Memristors - Materials, Interfaces and Applications

The backbone of modern computing systems rely on two key things: logic and memory, and while computing power has
seen tremendous advancements through scaling of the fundamental building block – the transistor, memory access hasn’t
evolved as rapidly, leading to significant memory-bound systems. Additionally, the rapid evolution of machine learning
and deep neural network (DNN) applications, has exposed the fundamental limitations of the traditional von Neumann
computing architecture, due to its heavy reliance on memory access. The physical separation between the computing unit
and the memory in von Neumann architectures is limiting performance and energy efficiency. A promising solution to
address these challenges is the development of emerging non-volatile memory technologies that provide significant scaling
and integration possibilities, fast switching speeds, and highly energy-efficient operations. Additionally, by integrating
“memory resistors” (memristors) in large crossbar arrays, the computation can take place in-memory which can resolve the
bottleneck in traditional von Neumann architectures.
This thesis investigates the implementation of ferroelectric HfO2 in ferroelectric tunnel junctions (FTJs) and ferroelectric
field effect transistors (FeFETs) as potential candidates for emerging non-volatile memories and memristors.
Initially, the thesis focuses on the integration of ferroelectric HfO2 onto the high mobility III-V semiconductor InAs for
the fabrication of metal-oxide-semiconductor (MOS) capacitors. Moreover, optimization of the processing conditions on the
critical interface between the semiconductor and high-k oxide is extensively studied using both electrical characterization and
synchrotron radiation techniques. After optimization of the annealing treatment and top electrode texturing, the fabrication
of vertical InAs nanowire FeFETs is successfully implemented. The FeFET shows encouraging initial results with limitations
solvable by further process engineering.
The fabrication of metal-insulator-metal (MIM) capacitors with a tungsten (W) top electrode enables ferroelectricity in
HfxZr1􀀀xO2 films down to 3.2 nm thickness. However, achieving ferroelectric properties in ultra-thin films requires an
annealing temperature above the thermal budget for back-end-of-line (BEOL) integration. To combat this, nanosecond laser
annealing (NLA) is introduced, where an ultrafast laser pulse confines the annealing both spatially and depth-wise. Using
NLA, we crystallize 3.6 nm-thick HfxZr1􀀀xO2 films while still being BEOL compatible.
The ability to fabricate thin ferroelectric HfO2 films opens up for the fabrication of FTJs, however, being constrained to a
W top electrode is severely limiting the device design. By introducing the concept of a crystallization electrode (CE) and a
metal replacement process, tuning of the FTJ device characteristics is achieved. We also highlight the impact of the postmetallization
annealing (PMA) temperature on the tunneling electroresistance ratio (TER) of the FTJ. Despite giving similar
ferroelectric properties, the PMA temperature strongly affects the interface quality which is key for FTJ performance.
Partial polarization switching is utilized to achieve multi-state conductance levels in the FTJs, demonstrating its memristive
capabilities. The stable state retention and low variability are promising for the realization of in-memory computing using
crossbar arrays. Finally, the impact of random telegraph noise (RTN) in ultra-scaled FTJs and the scalability of FTJ crossbar
arrays is assessed. The low conductance of FTJ memristors reduces the IR drop, while the self-rectifying current-voltage
property relaxes the need for an external selector, results that encourage the realization of FTJ-based in-memory computing
accelerators.