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This paper describes a hardware efficient linear pre-coder for Massive MIMO Base Stations (BSs) comprising a very large number of antennas, say, in the order of 100s, serving multiple users simultaneously. To avoid hardware demanding direct matrix inversions required for the Zero-Forcing (ZF) pre-coder, we use low complexity Neumann series based approximations. Furthermore, we propose a method to speed-up the convergence of the Neumann series by using tri-diagonal pre-condition matrices, which lowers the complexity even further. As a proof of concept a flexible VLSI architecture is presented with an implementation supporting matrix inversion of sizes up-to 16 × 16. In 65 nm CMOS, a throughput of 0.5M matrix inversions per sec is achieved at clock frequency of 420 MHz with a 104K gate count.
|Title of host publication||[Host publication title missing]|
|Publisher||IEEE - Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||4|
|Publication status||Published - 2014|
|Event||IEEE International Symposium on Circuits and Systems (ISCAS), 2014 - Melbourne, Austrailia, Melbourne, Australia|
Duration: 2014 Jun 1 → 2014 Jun 5
|Conference||IEEE International Symposium on Circuits and Systems (ISCAS), 2014|
|Period||2014/06/01 → 2014/06/05|
Subject classification (UKÄ)
- Electrical Engineering, Electronic Engineering, Information Engineering
- Massive MIMO
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