High Transconductance Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET

Mikael Egard; Lars Ohlsson; Mattias Borg; Filip Lenrick; Reine Wallenberg; Lars-Erik Wernersson; Erik Lind

High Transconductance Self-Aligned Gate-Last Surface Channel In_0.53Ga_0.47As MOSFET

Mikael Egard, Lars Ohlsson, Mattias Borg, Filip Lenrick, Reine Wallenberg, Lars-Erik Wernersson, Erik Lind

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance of 1.9 mS/mu m and on-resistance of 199 Omega mu m. T he self-aligned MOSFET is formed using metalorganic chemical vapor deposition regrowth of highly doped source and drain access regions. The fabricated 140 nm gate length devices shows a low subthreshold swing of 79 mV/decade, which is attributed to the described low temperature gate-last process scheme.

Original language	English
Title of host publication	2011 IEEE International Electron Devices Meeting (IEDM)
Publisher	IEEE Press
ISBN (Print)	978-1-4577-0505-2
Publication status	Published - 2011
Event	IEEE International Electron Devices Meeting (IEDM) - Washington, DC Duration: 2011 Dec 5 → 2011 Dec 7

Conference

Conference	IEEE International Electron Devices Meeting (IEDM)
Period	2011/12/05 → 2011/12/07

Subject classification (UKÄ)

Condensed Matter Physics (including Material Physics, Nano Physics)
Electrical Engineering, Electronic Engineering, Information Engineering

Cite this

@inproceedings{d9452a9e8bba431aa077d1b8c4bc0d96,

title = "High Transconductance Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET",

abstract = "In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance of 1.9 mS/mu m and on-resistance of 199 Omega mu m. T he self-aligned MOSFET is formed using metalorganic chemical vapor deposition regrowth of highly doped source and drain access regions. The fabricated 140 nm gate length devices shows a low subthreshold swing of 79 mV/decade, which is attributed to the described low temperature gate-last process scheme.",

author = "Mikael Egard and Lars Ohlsson and Mattias Borg and Filip Lenrick and Reine Wallenberg and Lars-Erik Wernersson and Erik Lind",

year = "2011",

language = "English",

isbn = "978-1-4577-0505-2",

booktitle = "2011 IEEE International Electron Devices Meeting (IEDM)",

publisher = "IEEE Press",

note = "IEEE International Electron Devices Meeting (IEDM) ; Conference date: 05-12-2011 Through 07-12-2011",

}

TY - GEN

T1 - High Transconductance Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET

AU - Egard, Mikael

AU - Ohlsson, Lars

AU - Borg, Mattias

AU - Lenrick, Filip

AU - Wallenberg, Reine

AU - Wernersson, Lars-Erik

AU - Lind, Erik

PY - 2011

Y1 - 2011

N2 - In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance of 1.9 mS/mu m and on-resistance of 199 Omega mu m. T he self-aligned MOSFET is formed using metalorganic chemical vapor deposition regrowth of highly doped source and drain access regions. The fabricated 140 nm gate length devices shows a low subthreshold swing of 79 mV/decade, which is attributed to the described low temperature gate-last process scheme.

AB - In this paper we present a 55 nm gate length In0.53Ga0.47As MOSFET with extrinsic transconductance of 1.9 mS/mu m and on-resistance of 199 Omega mu m. T he self-aligned MOSFET is formed using metalorganic chemical vapor deposition regrowth of highly doped source and drain access regions. The fabricated 140 nm gate length devices shows a low subthreshold swing of 79 mV/decade, which is attributed to the described low temperature gate-last process scheme.

UR - https://www.scopus.com/pages/publications/84857028530

M3 - Paper in conference proceeding

SN - 978-1-4577-0505-2

BT - 2011 IEEE International Electron Devices Meeting (IEDM)

PB - IEEE Press

T2 - IEEE International Electron Devices Meeting (IEDM)

Y2 - 5 December 2011 through 7 December 2011

ER -

High Transconductance Self-Aligned Gate-Last Surface Channel In_0.53Ga_0.47As MOSFET

Abstract

Conference

Subject classification (UKÄ)

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