III-V Heterostructure Nanowire Tunnel FETs

Erik Lind; Elvedin Memisevic; Anil Dey; Lars-Erik Wernersson

doi:10.1109/JEDS.2015.2388811

III-V Heterostructure Nanowire Tunnel FETs

Erik Lind, Elvedin Memisevic, Anil Dey, Lars-Erik Wernersson

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Abstract

In this paper, InAs/GaSb nanowire tunnel field-effect transistors (TFETs) are studied theoretically and experimentally. A 2-band 1-D analytic tunneling model is used to calculate the on- and off-current levels of nanowire TFETs with staggered source/channel band alignment. Experimental results from lateral InAs/GaSb are shown, as well as first results on integration of vertical InAs/GaSb nanowire TFETs on Si substrates.

Original language	English
Pages (from-to)	96-102
Journal	IEEE Journal of the Electron Devices Society
Volume	3
Issue number	3
DOIs	https://doi.org/10.1109/JEDS.2015.2388811
Publication status	Published - 2015

Subject classification (UKÄ)

Other Electrical Engineering, Electronic Engineering, Information Engineering

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10.1109/JEDS.2015.2388811

Lind_InAs_GaSb_TFETFinal published version, 734 KB

1 Doctoral Thesis (compilation)

Vertical III-V Nanowire Tunnel Field-Effect Transistor
Memisevic, E., 2017 Aug 21, Lund: The Department of Electrical and Information Technology.
Research output: Thesis › Doctoral Thesis (compilation)

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title = "III-V Heterostructure Nanowire Tunnel FETs",

abstract = "In this paper, InAs/GaSb nanowire tunnel field-effect transistors (TFETs) are studied theoretically and experimentally. A 2-band 1-D analytic tunneling model is used to calculate the on- and off-current levels of nanowire TFETs with staggered source/channel band alignment. Experimental results from lateral InAs/GaSb are shown, as well as first results on integration of vertical InAs/GaSb nanowire TFETs on Si substrates.",

author = "Erik Lind and Elvedin Memisevic and Anil Dey and Lars-Erik Wernersson",

year = "2015",

doi = "10.1109/JEDS.2015.2388811",

language = "English",

volume = "3",

pages = "96--102",

journal = "IEEE Journal of the Electron Devices Society",

issn = "2168-6734",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

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T1 - III-V Heterostructure Nanowire Tunnel FETs

AU - Lind, Erik

AU - Memisevic, Elvedin

AU - Dey, Anil

AU - Wernersson, Lars-Erik

PY - 2015

Y1 - 2015

N2 - In this paper, InAs/GaSb nanowire tunnel field-effect transistors (TFETs) are studied theoretically and experimentally. A 2-band 1-D analytic tunneling model is used to calculate the on- and off-current levels of nanowire TFETs with staggered source/channel band alignment. Experimental results from lateral InAs/GaSb are shown, as well as first results on integration of vertical InAs/GaSb nanowire TFETs on Si substrates.

AB - In this paper, InAs/GaSb nanowire tunnel field-effect transistors (TFETs) are studied theoretically and experimentally. A 2-band 1-D analytic tunneling model is used to calculate the on- and off-current levels of nanowire TFETs with staggered source/channel band alignment. Experimental results from lateral InAs/GaSb are shown, as well as first results on integration of vertical InAs/GaSb nanowire TFETs on Si substrates.

U2 - 10.1109/JEDS.2015.2388811

DO - 10.1109/JEDS.2015.2388811

M3 - Article

SN - 2168-6734

VL - 3

SP - 96

EP - 102

JO - IEEE Journal of the Electron Devices Society

JF - IEEE Journal of the Electron Devices Society

IS - 3

ER -

III-V Heterostructure Nanowire Tunnel FETs

Abstract

Subject classification (UKÄ)

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Research output

Vertical III-V Nanowire Tunnel Field-Effect Transistor

Cite this