Abstract
III-V MOSFETs provide improved electrostatic control at scaled gate lengths combined with a considerable reduction in gate leakage current. Following the natural transistor evolution, we investigate vertical III-V nanowire MOSFETs and fabricate MOSFETs with gm>3 S/mm integrated on Si substrates. Careful investigations of the dynamic properties show high MSG-value of 14.5 dB at 20 GHz with a small-signal III-V MOSFET model including also trap response related to defects within the high-k film. From 1/f-investigations we determine the distribution of defects in the gate-stack and find a local minimum around the conduction band edge with a Nbt between mid-1018 and mid-1019 cm-3 eV-1. The III-V nanowire MOSFETs are used to design D-band LNAs with competitive performance. They also show promise for integration of pMOSFETs, TFETs, and RRAM elements opening a wide range of applications.
Original language | English |
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Title of host publication | 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020 |
Publisher | IEEE - Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781728197494 |
DOIs | |
Publication status | Published - 2020 Nov 16 |
Event | 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020 - Monterey, United States Duration: 2020 Nov 16 → 2020 Nov 19 |
Conference
Conference | 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020 |
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Country/Territory | United States |
City | Monterey |
Period | 2020/11/16 → 2020/11/19 |
Subject classification (UKÄ)
- Nano-technology
Free keywords
- High-frequency characteristics
- III-V MOSFETs
- III-V Nanowires