III-V semiconductor nanowires for future devices

Heinz Schmid, Mattias Borg, K. Moselund, P. Das Kanungo, G. Signorello, S. Karg, P. Mensch, V. Schmidt, H. Riel

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

Abstract

The monolithic integration of III-V nanowires on silicon by direct epitaxial growth enables new possibilities for the design and fabrication of electronic as well as optoelectronic devices. We demonstrate a new growth technique to directly integrate III-V semiconducting nanowires on silicon using selective area epitaxy within a nanotube template. Thus we achieve small diameter nanowires, controlled doping profiles and sharp heterojunctions essential for future device applications. We experimentally demonstrate vertical tunnel diodes and gate-all-around tunnel FETs based on InAs-Si nanowire heterojunctions. The results indicate the benefits of the InAs-Si material system combining the possibility of achieving high Ion with high Ion/Ioff ratio.

Original languageEnglish
Title of host publicationProceedings -Design, Automation and Test in Europe, DATE
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
ISBN (Print)9783981537024
DOIs
Publication statusPublished - 2014
Externally publishedYes
Event17th Design, Automation and Test in Europe, DATE 2014 - Dresden, Germany
Duration: 2014 Mar 242014 Mar 28

Conference

Conference17th Design, Automation and Test in Europe, DATE 2014
Country/TerritoryGermany
CityDresden
Period2014/03/242014/03/28

Subject classification (UKÄ)

  • Other Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

  • Esaki diodes
  • III-V semiconductors
  • nanowires
  • Tunnel FETs

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