Abstract
The high computational complexity of acoustic echo cancellation algorithms requires application specific implementations to sustain real time signal processing with affordable power consumption. This is especially true for systems where a delayless approach is considered important, e.g. wireless communication systems. The proposed paper presents architectural considerations to reach a feasible hardware solution.
Original language | English |
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Title of host publication | [Host publication title missing] |
Pages | 97-100 |
DOIs | |
Publication status | Published - 1999 |
Event | 42nd Midwest Symposium on Circuits and Systems - Las Cruces, NM, United States Duration: 1999 Aug 8 → 1999 Aug 11 |
Conference
Conference | 42nd Midwest Symposium on Circuits and Systems |
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Country/Territory | United States |
City | Las Cruces, NM |
Period | 1999/08/08 → 1999/08/11 |
Subject classification (UKÄ)
- Electrical Engineering, Electronic Engineering, Information Engineering