Implementing a streaming application on a processor array: A case study on the Epiphany architecture

Jerry Lindstrom; Stefan Nanneson; Jörn Janneck

doi:10.1109/ACSSC.2015.7421108

Implementing a streaming application on a processor array: A case study on the Epiphany architecture

Jerry Lindstrom, Stefan Nanneson, Jörn Janneck

Lund University

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

This paper reports on a case study in which an at- size application is ported onto a commercially available processor array. Its purpose is threefold: (1) Determine the suitability of processor arrays for this kind of application. (2) Develop a runtime software infrastructure that supports streaming applications on processor arrays. (3) Gather data and insights into the resulting system performance and the factors that affect it. In this study, we port a video decoder onto the Parallella platform, a small credit-card sized board that includes a 16 core Epiphany processor array by Adapteva, along with a dual-core ARM processor, some programmable logic, and shared DRAM. We discuss the infrastructure required to execute the application on that platform and how the Epiphany architecture facilitated the construction of lockless distributed inter-core communication. In so doing, we build in part on a previous study on a much smaller example in [1].

Original language	English
Title of host publication	Conference Record - Asilomar Conference on Signals, Systems and Computers
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	177-181
Number of pages	5
Volume	2016-February
ISBN (Print)	9781467385763
DOIs	https://doi.org/10.1109/ACSSC.2015.7421108
Publication status	Published - 2016 Feb 26
Event	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 - Pacific Grove, California, Pacific Grove, United States Duration: 2015 Nov 8 → 2015 Nov 11

Conference

Conference	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015
Country/Territory	United States
City	Pacific Grove
Period	2015/11/08 → 2015/11/11

Subject classification (UKÄ)

Software Engineering

Free keywords

ARM
CAL
Epiphany
MPEG
parallel computing
Parallella
processor arrays
stream processing

Access to Document

10.1109/ACSSC.2015.7421108

Cite this

Lindstrom, J., Nanneson, S., & Janneck, J. (2016). Implementing a streaming application on a processor array: A case study on the Epiphany architecture. In Conference Record - Asilomar Conference on Signals, Systems and Computers (Vol. 2016-February, pp. 177-181). Article 7421108 IEEE - Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ACSSC.2015.7421108

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title = "Implementing a streaming application on a processor array: A case study on the Epiphany architecture",

abstract = "This paper reports on a case study in which an at- size application is ported onto a commercially available processor array. Its purpose is threefold: (1) Determine the suitability of processor arrays for this kind of application. (2) Develop a runtime software infrastructure that supports streaming applications on processor arrays. (3) Gather data and insights into the resulting system performance and the factors that affect it. In this study, we port a video decoder onto the Parallella platform, a small credit-card sized board that includes a 16 core Epiphany processor array by Adapteva, along with a dual-core ARM processor, some programmable logic, and shared DRAM. We discuss the infrastructure required to execute the application on that platform and how the Epiphany architecture facilitated the construction of lockless distributed inter-core communication. In so doing, we build in part on a previous study on a much smaller example in [1].",

keywords = "ARM, CAL, Epiphany, MPEG, parallel computing, Parallella, processor arrays, stream processing",

author = "Jerry Lindstrom and Stefan Nanneson and J{\"o}rn Janneck",

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booktitle = "Conference Record - Asilomar Conference on Signals, Systems and Computers",

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note = "49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 ; Conference date: 08-11-2015 Through 11-11-2015",

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Lindstrom, J, Nanneson, S & Janneck, J 2016, Implementing a streaming application on a processor array: A case study on the Epiphany architecture. in Conference Record - Asilomar Conference on Signals, Systems and Computers. vol. 2016-February, 7421108, IEEE - Institute of Electrical and Electronics Engineers Inc., pp. 177-181, 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015, Pacific Grove, United States, 2015/11/08. https://doi.org/10.1109/ACSSC.2015.7421108

Implementing a streaming application on a processor array: A case study on the Epiphany architecture. / Lindstrom, Jerry; Nanneson, Stefan; Janneck, Jörn.
Conference Record - Asilomar Conference on Signals, Systems and Computers. Vol. 2016-February IEEE - Institute of Electrical and Electronics Engineers Inc., 2016. p. 177-181 7421108.

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

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T1 - Implementing a streaming application on a processor array

T2 - 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015

AU - Lindstrom, Jerry

AU - Nanneson, Stefan

AU - Janneck, Jörn

PY - 2016/2/26

Y1 - 2016/2/26

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AB - This paper reports on a case study in which an at- size application is ported onto a commercially available processor array. Its purpose is threefold: (1) Determine the suitability of processor arrays for this kind of application. (2) Develop a runtime software infrastructure that supports streaming applications on processor arrays. (3) Gather data and insights into the resulting system performance and the factors that affect it. In this study, we port a video decoder onto the Parallella platform, a small credit-card sized board that includes a 16 core Epiphany processor array by Adapteva, along with a dual-core ARM processor, some programmable logic, and shared DRAM. We discuss the infrastructure required to execute the application on that platform and how the Epiphany architecture facilitated the construction of lockless distributed inter-core communication. In so doing, we build in part on a previous study on a much smaller example in [1].

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KW - CAL

KW - Epiphany

KW - MPEG

KW - parallel computing

KW - Parallella

KW - processor arrays

KW - stream processing

U2 - 10.1109/ACSSC.2015.7421108

DO - 10.1109/ACSSC.2015.7421108

M3 - Paper in conference proceeding

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SN - 9781467385763

VL - 2016-February

SP - 177

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BT - Conference Record - Asilomar Conference on Signals, Systems and Computers

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

Y2 - 8 November 2015 through 11 November 2015

ER -

Implementing a streaming application on a processor array: A case study on the Epiphany architecture

Abstract

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Subject classification (UKÄ)

Free keywords

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Cite this