Abstract
Microelectronics promises a high component density and low power dissipation to embedded systems. Unfortunately such a component will always suffer from various error types that make the chip respond differently from its functional simulation. This is especially true for Cellular Neural Networks (CNN), which makes the determination of robust, low-precision parameters to guarantee small footprint and reliable operation an important design consideration. This paper describes the digital word width effects in a CNN implementation that must be considered to achieve a small size for a reliable system. It discusses the automated design space exploration using a Field-Programmable Gate-Array (FPGA) implementation to perform an optimal CNN parameters selection.
Original language | English |
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Title of host publication | Proceedings of the 2006 10th IEEE International Workshop on Cellular Neural Networks and Their Applications |
Publisher | IEEE - Institute of Electrical and Electronics Engineers Inc. |
Pages | 328-333 |
Number of pages | 6 |
ISBN (Print) | 1-4244-0639-0 |
DOIs | |
Publication status | Published - 2006 |
Event | 10th International Workshop on Cellular Neural Networks and their Applications (CNNA) - Istanbul Duration: 2006 Aug 28 → 2006 Aug 30 |
Conference
Conference | 10th International Workshop on Cellular Neural Networks and their Applications (CNNA) |
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Period | 2006/08/28 → 2006/08/30 |
Subject classification (UKÄ)
- Electrical Engineering, Electronic Engineering, Information Engineering
Free keywords
- automated design space exploration
- digital word width effects
- cellular neural networks
- microelectronics
- robust templates
- embedded systems
- field-programmable gate-array