InAs nanowire GAA n-MOSFETs with 12-15 nm diameter

T. Vasen, P. Ramvall, A. Afzalian, C. Thelander, K. A. Dick, M. Holland, G. Doornbos, S. W. Wang, R. Oxland, G. Vellianitis, M. J H Van Dal, B. Duriez, J. R. Ramirez, R. Droopad, L. E. Wernersson, L. Samuelson, T. K. Chen, Y. C. Yeo, M. Passlack

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

Abstract

InAs nanowires (NW) grown by MOCVD with diameter d as small as 10 nm and gate-All-Around (GAA) MOSFETs with d = 12-15 nm are demonstrated. Ion = 314 μA/μm, and Ssat =68 mV/dec was achieved at Vdd = 0.5 V (Ioff = 0.1 μA/μm). Highest gm measured is 2693 μS/μm. Device performance is enabled by small diameter and optimized high-k/InAs gate stack process. Device performance tradeoffs between gm, Ron, and Imin are discussed.

Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Volume2016-September
ISBN (Electronic)9781509006373
DOIs
Publication statusPublished - 2016 Sept 21
Event36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 - Honolulu, United States
Duration: 2016 Jun 132016 Jun 16

Conference

Conference36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
Country/TerritoryUnited States
CityHonolulu
Period2016/06/132016/06/16

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering
  • Condensed Matter Physics

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