InAsP/InAs nanowire heterostructure field effect transistors

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceedingpeer-review

Abstract

We here show simulation results that by including a small InAsP heterostructure barrier inside the channel of a InAs nanowire transistor it is possible to increase both the sub threshold slope and on-off ratio with only a modest decrease in the drive current for a fixed gate overdrive. The design is based on the fact that the sharp InAsP heterostructure induces a small barrier in the conduction band and locally increases the bandgap, independent of the applied drain voltage
Original languageEnglish
Title of host publicationDevice Research Conference
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages173-174
ISBN (Print)0-7803-9748-7
DOIs
Publication statusPublished - 2006
EventDevice Research Conference, 2006 - University Park, PA, United States
Duration: 2006 Jun 262006 Jun 28

Conference

ConferenceDevice Research Conference, 2006
Country/TerritoryUnited States
CityUniversity Park, PA
Period2006/06/262006/06/28

Subject classification (UKÄ)

  • Condensed Matter Physics (including Material Physics, Nano Physics)
  • Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

  • nanowire heterostructure field effect transistors
  • InAsP-InAs

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