Junction Engineering in Nanostructured Optoelectronic Devices

Semiconductor nanowires have proven to be promising building blocks for next-generation optoelectronic devices. The nanometric dimensions of nanowires provides strain relaxation capability, thus enabling the heteroepitaxy of III-V materials on silicon, as well as providing the possibility of realizing optoelectronic devices with lattice-mismatched material combinations. The subwavelength dimensions of nanowires and their large surface-to-volume ratio can enable nanowires to enhance optical absorption. The above-mentioned properties make nanowires/nanostructures potential candidates for the realization of efficient and low-cost optoelectronics.

In this work we have fabricated vertical arrays of InP nanowire p-n junctions to quantitatively evaluate the p-doping in nanowires using the capacitance-voltage method, fabricated and characterized vertical arrays of nanowire photovoltaic devices, and photodetectors in InP material system, as well as fabricating and characterizing nanostructured GaN-based light emitting diodes. We have developed a novel characterization method by engineering the p-i-n junctions in InP core-shell nanowires which enabled us to perform a reasonable comparative study of absorption between vertically and laterally oriented nanowire photovoltaic devices, studied the effect of junction position on the performance of InP axial p-i-n photodetectors/solar cells, and realized nanostructured (Al)(In)GaN UV, blue, green and red light emitting diodes enabled by junction placement on the c crystal plane.