Modeling and exploration of a reconfigurable architecture for digital holographic imaging

Thomas Lenart; Henrik Svensson; Viktor Öwall

doi:10.1109/ISCAS.2008.4541401

Modeling and exploration of a reconfigurable architecture for digital holographic imaging

Thomas Lenart, Henrik Svensson, Viktor Öwall

Department of Electrical and Information Technology

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

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Abstract

The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.

Original language	English
Title of host publication	[Host publication title missing]
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	248-251
ISBN (Print)	978-1-4244-1683-7
DOIs	https://doi.org/10.1109/ISCAS.2008.4541401
Publication status	Published - 2008
Event	IEEE International Symposium on Circuits and Systems (ISCAS), 2008 - Seattle, United States Duration: 2008 May 18 → 2008 May 21

Conference

Conference	IEEE International Symposium on Circuits and Systems (ISCAS), 2008
Country/Territory	United States
City	Seattle
Period	2008/05/18 → 2008/05/21

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

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10.1109/ISCAS.2008.4541401

modeling04541401

Cite this

@inproceedings{3bfbd9388bca4d04944aec5a1cfe1b82,

title = "Modeling and exploration of a reconfigurable architecture for digital holographic imaging",

abstract = "The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.",

author = "Thomas Lenart and Henrik Svensson and Viktor {\"O}wall",

year = "2008",

doi = "10.1109/ISCAS.2008.4541401",

language = "English",

isbn = "978-1-4244-1683-7",

pages = "248--251",

booktitle = "[Host publication title missing]",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems (ISCAS), 2008 ; Conference date: 18-05-2008 Through 21-05-2008",

}

Lenart, T, Svensson, H & Öwall, V 2008, Modeling and exploration of a reconfigurable architecture for digital holographic imaging. in [Host publication title missing]. IEEE - Institute of Electrical and Electronics Engineers Inc., pp. 248-251, IEEE International Symposium on Circuits and Systems (ISCAS), 2008, Seattle, United States, 2008/05/18. https://doi.org/10.1109/ISCAS.2008.4541401

TY - GEN

T1 - Modeling and exploration of a reconfigurable architecture for digital holographic imaging

AU - Lenart, Thomas

AU - Svensson, Henrik

AU - Öwall, Viktor

PY - 2008

Y1 - 2008

N2 - The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.

AB - The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.

U2 - 10.1109/ISCAS.2008.4541401

DO - 10.1109/ISCAS.2008.4541401

M3 - Paper in conference proceeding

SN - 978-1-4244-1683-7

SP - 248

EP - 251

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE International Symposium on Circuits and Systems (ISCAS), 2008

Y2 - 18 May 2008 through 21 May 2008

ER -

Modeling and exploration of a reconfigurable architecture for digital holographic imaging

Abstract

Conference

Subject classification (UKÄ)

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