Portable digital clock generator for digital signal processing applications

Thomas Olsson, Peter Nilsson

Research output: Contribution to journalArticlepeer-review


A fully integrated clock generator with behaviour similar to a PLL is proposed. A free-running ring oscillator is used as internal clock and the output clock is generated using two counters. The clock generator is described in synthesisable VHDL-code and can therefore easily be made from standard cells found in any commercial standard CMOS cell library.
Original languageEnglish
Pages (from-to)1372-1374
JournalElectronics Letters
Issue number19
Publication statusPublished - 2003

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering


Dive into the research topics of 'Portable digital clock generator for digital signal processing applications'. Together they form a unique fingerprint.

Cite this