Programming support for reconfigurable custom vector architectures

Mehmet Ali Arslan; Krzysztof Kuchcinski; Flavius Gruian; Yangxurui Liu

doi:10.1145/2712386.2712399

Programming support for reconfigurable custom vector architectures

Mehmet Ali Arslan, Krzysztof Kuchcinski, Flavius Gruian, Yangxurui Liu

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.

Original language	English
Title of host publication	Proc. PPoPP, Principles and Practice of Parallel Programming
Editors	Pavan Balaji, Minyi Guo, Zhiyi Huang
Publisher	Association for Computing Machinery (ACM)
Pages	49-57
Number of pages	9
ISBN (Print)	978-1-4503-3404-4
DOIs	https://doi.org/10.1145/2712386.2712399
Publication status	Published - 2015
Event	PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel - San Francisco, CA, United States Duration: 2015 Feb 7 → 2015 Feb 11

Conference

Conference	PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel
Country/Territory	United States
City	San Francisco, CA
Period	2015/02/07 → 2015/02/11

Subject classification (UKÄ)

Computer Sciences
Electrical Engineering, Electronic Engineering, Information Engineering

Access to Document

10.1145/2712386.2712399

1 Doctoral Thesis (compilation)

Efficient Processing and Storage for Massive MIMO Digital Baseband
Liu, Y., 2018, Department of Electrical and Information Technology, Lund University. 147 p.
Research output: Thesis › Doctoral Thesis (compilation)

Open Access
File

1 Finished

HiPEC: High Performance Embedded Computing
Gruian, F. (Researcher), Kuchcinski, K. (Researcher), Janneck, J. (Researcher), Arslan, M. A. (Researcher), Mirza, U. M. (Researcher), Zhang, C. (Researcher), Cedersjö, G. (Researcher), Prabhu, H. (Researcher), Liu, L. (Researcher), Zhu, M. (Researcher), Liu, Y. (Researcher), Edfors, O. (Researcher) & Öwall, V. (Researcher)
Swedish Foundation for Strategic Research, SSF
2011/01/01 → 2015/12/31
Project: Research

Cite this

@inproceedings{ae845c712e0d42cfba164e292d8a81d7,

title = "Programming support for reconfigurable custom vector architectures",

abstract = "High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.",

author = "Arslan, {Mehmet Ali} and Krzysztof Kuchcinski and Flavius Gruian and Yangxurui Liu",

year = "2015",

doi = "10.1145/2712386.2712399",

language = "English",

isbn = "978-1-4503-3404-4",

pages = "49--57",

editor = "Pavan Balaji and Minyi Guo and Zhiyi Huang",

booktitle = "Proc. PPoPP, Principles and Practice of Parallel Programming",

publisher = "Association for Computing Machinery (ACM)",

address = "United States",

note = "PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel ; Conference date: 07-02-2015 Through 11-02-2015",

}

Arslan, MA, Kuchcinski, K, Gruian, F & Liu, Y 2015, Programming support for reconfigurable custom vector architectures. in P Balaji, M Guo & Z Huang (eds), Proc. PPoPP, Principles and Practice of Parallel Programming. Association for Computing Machinery (ACM), pp. 49-57, PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel, San Francisco, CA, United States, 2015/02/07. https://doi.org/10.1145/2712386.2712399

Programming support for reconfigurable custom vector architectures. / Arslan, Mehmet Ali; Kuchcinski, Krzysztof; Gruian, Flavius et al.
Proc. PPoPP, Principles and Practice of Parallel Programming. ed. / Pavan Balaji; Minyi Guo; Zhiyi Huang. Association for Computing Machinery (ACM), 2015. p. 49-57.

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

TY - GEN

T1 - Programming support for reconfigurable custom vector architectures

AU - Arslan, Mehmet Ali

AU - Kuchcinski, Krzysztof

AU - Gruian, Flavius

AU - Liu, Yangxurui

PY - 2015

Y1 - 2015

N2 - High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.

AB - High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.

U2 - 10.1145/2712386.2712399

DO - 10.1145/2712386.2712399

M3 - Paper in conference proceeding

SN - 978-1-4503-3404-4

SP - 49

EP - 57

BT - Proc. PPoPP, Principles and Practice of Parallel Programming

A2 - Balaji, Pavan

A2 - Guo, Minyi

A2 - Huang, Zhiyi

PB - Association for Computing Machinery (ACM)

T2 - PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel

Y2 - 7 February 2015 through 11 February 2015

ER -

Programming support for reconfigurable custom vector architectures

Abstract

Conference

Subject classification (UKÄ)

Access to Document

Fingerprint

Research output

Efficient Processing and Storage for Massive MIMO Digital Baseband

Projects

HiPEC: High Performance Embedded Computing

Cite this