@inproceedings{601af2cd1ad5451983810b10f6f35da4,
title = "Reconfigurable multi-access pattern vector memory for real-time orb feature extraction",
abstract = "This work presents an on-chip memory subsystem envisioned for real-time applications performing Oriented FAST and Rotated Brief (ORB) feature extraction for Simultaneous Localization and Mapping (SLAM) systems. For autonomous navigation of battery-powered devices, feature-based SLAM is a computationally frugal alternative to direct methods. This paper thoroughly analyses ORB multiple memory access patterns, exploring possible systematic parallelism and hardware-biased algorithmic enhancements, alleviating requirements on bandwidth and reducing redundant accesses. Enabling those, a suitable multi-bank parallel memory featuring run-time reconfigurable address generation, image allotment, and close-to-memory data-shuffling is proposed. As case study, a 30 Frames-Per-Second (FPS) VGA-resolution ORB-capable 8-bank memory is evaluated using 22 FDX technology, running at 909 MHz, with a negligible area overhead of 0.3%, reducing operand accesses between 54 − 160× relative to Sudoku-like and scalar memories.",
keywords = "Feature extraction, ORB, Programmable multiple memory access patterns, Vision-based SLAM",
author = "Lucas Ferreira and Steffen Malkowsky and Patrik Persson and Karl Astr{\"o}m and Liang Liu",
year = "2021",
doi = "10.1109/ISCAS51556.2021.09401698",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings",
address = "United States",
note = "53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 ; Conference date: 22-05-2021 Through 28-05-2021",
}