Abstract
Semiconductor-based single-electron transistors have been fabricated using heterostructure nanowire growth, by introducing a double barrier of InP into InAs nanowires. From electrical measurements, we observe a charging energy of 4 meV for the approximately 55 nm diameter and 100 nm long InAs islands between the InP barriers. The Coulomb blockade can be periodically lifted as a function of gate voltage for all devices, which is a typical signature of single-island transistors. Homogeneous InAs nanowires show no such effect for the corresponding voltage ranges. ©2003 American Institute of Physics.
Original language | English |
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Pages (from-to) | 2052-2054 |
Journal | Applied Physics Letters |
Volume | 83 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2003 |
Bibliographical note
The information about affiliations in this record was updated in December 2015.The record was previously connected to the following departments: Polymer and Materials Chemistry (LTH) (011001041), Solid State Physics (011013006), Neuronano Research Center (NRC) (013210020), NanoLund (011012012)
Subject classification (UKÄ)
- Chemical Sciences