Snow 2.0 IP core for trusted hardware

Wen Hai Fang; Thomas Johansson; Lambert Spaanenburg

doi:10.1109/FPL.2005.1515735

Snow 2.0 IP core for trusted hardware

Wen Hai Fang, Thomas Johansson, Lambert Spaanenburg

Department of Electrical and Information Technology

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

Stream ciphers like Snow 2.0 are very promising techniques for encryption in trusted hardware, but demand specialized IP cores to enhance conventional architectures. The paper describes the design of such a core that can be adapted to the system needs according to a ratio of throughput and effective slice usage of 3.2 to 3.5. The footprint is comparable with a commercial floating-point unit.

Original language	English
Title of host publication	Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	281-286
Volume	2005
DOIs	https://doi.org/10.1109/FPL.2005.1515735
Publication status	Published - 2005
Event	2005 International Conference on Field Programmable Logic and Applications (FPL) - Tampere, Finland Duration: 2005 Aug 24 → 2005 Aug 26

Publication series

Name
Volume	2005

Conference

Conference	2005 International Conference on Field Programmable Logic and Applications (FPL)
Country/Territory	Finland
City	Tampere
Period	2005/08/24 → 2005/08/26

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Free keywords

Behavioral Synthesis
Trusted Hardware
ISA-compliant IP-core
Stream cipher encryption
Pareto curve

Access to Document

10.1109/FPL.2005.1515735

Cite this

@inproceedings{99e9fc4a362c4cf99f2a748b435ba0dd,

title = "Snow 2.0 IP core for trusted hardware",

abstract = "Stream ciphers like Snow 2.0 are very promising techniques for encryption in trusted hardware, but demand specialized IP cores to enhance conventional architectures. The paper describes the design of such a core that can be adapted to the system needs according to a ratio of throughput and effective slice usage of 3.2 to 3.5. The footprint is comparable with a commercial floating-point unit.",

keywords = "Behavioral Synthesis, Trusted Hardware, ISA-compliant IP-core, Stream cipher encryption, Pareto curve",

author = "Fang, {Wen Hai} and Thomas Johansson and Lambert Spaanenburg",

year = "2005",

doi = "10.1109/FPL.2005.1515735",

language = "English",

volume = "2005",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

pages = "281--286",

booktitle = "Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL",

address = "United States",

note = "2005 International Conference on Field Programmable Logic and Applications (FPL) ; Conference date: 24-08-2005 Through 26-08-2005",

}

Fang, WH, Johansson, T & Spaanenburg, L 2005, Snow 2.0 IP core for trusted hardware. in Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. vol. 2005, IEEE - Institute of Electrical and Electronics Engineers Inc., pp. 281-286, 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, 2005/08/24. https://doi.org/10.1109/FPL.2005.1515735

Snow 2.0 IP core for trusted hardware. / Fang, Wen Hai; Johansson, Thomas; Spaanenburg, Lambert.
Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. Vol. 2005 IEEE - Institute of Electrical and Electronics Engineers Inc., 2005. p. 281-286.

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

TY - GEN

T1 - Snow 2.0 IP core for trusted hardware

AU - Fang, Wen Hai

AU - Johansson, Thomas

AU - Spaanenburg, Lambert

PY - 2005

Y1 - 2005

N2 - Stream ciphers like Snow 2.0 are very promising techniques for encryption in trusted hardware, but demand specialized IP cores to enhance conventional architectures. The paper describes the design of such a core that can be adapted to the system needs according to a ratio of throughput and effective slice usage of 3.2 to 3.5. The footprint is comparable with a commercial floating-point unit.

AB - Stream ciphers like Snow 2.0 are very promising techniques for encryption in trusted hardware, but demand specialized IP cores to enhance conventional architectures. The paper describes the design of such a core that can be adapted to the system needs according to a ratio of throughput and effective slice usage of 3.2 to 3.5. The footprint is comparable with a commercial floating-point unit.

KW - Behavioral Synthesis

KW - Trusted Hardware

KW - ISA-compliant IP-core

KW - Stream cipher encryption

KW - Pareto curve

U2 - 10.1109/FPL.2005.1515735

DO - 10.1109/FPL.2005.1515735

M3 - Paper in conference proceeding

VL - 2005

SP - 281

EP - 286

BT - Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - 2005 International Conference on Field Programmable Logic and Applications (FPL)

Y2 - 24 August 2005 through 26 August 2005

ER -

Snow 2.0 IP core for trusted hardware

Abstract

Publication series

Conference

Subject classification (UKÄ)

Free keywords

Access to Document

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Cite this