TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing

Jeremy Constantin; Ahmed Dogan; Oskar Andersson; Pascal Meinerzhagen; Joachim Rodrigues; David Atienza; Andreas Burg

doi:10.1109/VLSI-SoC.2012.6379023

TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing

Jeremy Constantin, Ahmed Dogan, Oskar Andersson, Pascal Meinerzhagen, Joachim Rodrigues, David Atienza, Andreas Burg

Department of Electrical and Information Technology

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

Abstract

Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.

Original language	English
Title of host publication	IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012
Publisher	IEEE - Institute of Electrical and Electronics Engineers Inc.
Pages	159-164
ISBN (Print)	978-1-4673-2657-5
DOIs	https://doi.org/10.1109/VLSI-SoC.2012.6379023
Publication status	Published - 2012
Event	IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC) - Santa Cruz, United States Duration: 2012 Oct 7 → …

Conference

Conference	IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC)
Country/Territory	United States
City	Santa Cruz
Period	2012/10/07 → …

Subject classification (UKÄ)

Electrical Engineering, Electronic Engineering, Information Engineering

Access to Document

10.1109/VLSI-SoC.2012.6379023

Cite this

Constantin, J., Dogan, A., Andersson, O., Meinerzhagen, P., Rodrigues, J., Atienza, D., & Burg, A. (2012). TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing. In IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012 (pp. 159-164). IEEE - Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-SoC.2012.6379023

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title = "TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing",

abstract = "Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.",

author = "Jeremy Constantin and Ahmed Dogan and Oskar Andersson and Pascal Meinerzhagen and Joachim Rodrigues and David Atienza and Andreas Burg",

year = "2012",

doi = "10.1109/VLSI-SoC.2012.6379023",

language = "English",

isbn = "978-1-4673-2657-5",

pages = "159--164",

booktitle = "IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC) ; Conference date: 07-10-2012",

}

Constantin, J, Dogan, A, Andersson, O, Meinerzhagen, P, Rodrigues, J, Atienza, D & Burg, A 2012, TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing. in IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012. IEEE - Institute of Electrical and Electronics Engineers Inc., pp. 159-164, IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Santa Cruz, United States, 2012/10/07. https://doi.org/10.1109/VLSI-SoC.2012.6379023

TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing. / Constantin, Jeremy; Dogan, Ahmed; Andersson, Oskar et al.
IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012. IEEE - Institute of Electrical and Electronics Engineers Inc., 2012. p. 159-164.

Research output: Chapter in Book/Report/Conference proceeding › Paper in conference proceeding › peer-review

TY - GEN

T1 - TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing

AU - Constantin, Jeremy

AU - Dogan, Ahmed

AU - Andersson, Oskar

AU - Meinerzhagen, Pascal

AU - Rodrigues, Joachim

AU - Atienza, David

AU - Burg, Andreas

PY - 2012

Y1 - 2012

N2 - Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.

AB - Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.

U2 - 10.1109/VLSI-SoC.2012.6379023

DO - 10.1109/VLSI-SoC.2012.6379023

M3 - Paper in conference proceeding

SN - 978-1-4673-2657-5

SP - 159

EP - 164

BT - IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC)

Y2 - 7 October 2012

ER -

Constantin J, Dogan A, Andersson O, Meinerzhagen P, Rodrigues J, Atienza D et al. TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing. In IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012. IEEE - Institute of Electrical and Electronics Engineers Inc. 2012. p. 159-164 doi: 10.1109/VLSI-SoC.2012.6379023

TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing

Abstract

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