Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules

N.S. Vinay, Erik Larsson, Virendra Singh

Research output: Contribution to conferencePaper, not in proceedingpeer-review

Original languageEnglish
Publication statusPublished - 2009
Externally publishedYes
EventDATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Tes - t, Nice, France
Duration: 2009 Apr 202009 Apr 24

Conference

ConferenceDATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Tes
Country/TerritoryFrance
Cityt, Nice
Period2009/04/202009/04/24

Subject classification (UKÄ)

  • Electrical Engineering, Electronic Engineering, Information Engineering

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