Nano Electronics

Organisational unit: Research group

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  1. 2021
  2. 2020
  3. Compressively-strained GaSb nanowires with core-shell heterostructures

    Zhongyunshen Zhu, Johannes Svensson, Axel R. Persson, Reine Wallenberg, Andrei V. Gromov & Lars Erik Wernersson, 2020 Sep, In: Nano Research. 13, 9, p. 2517-2524 8 p.

    Research output: Contribution to journalArticle

  4. Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon

    Saketh, Ram Mamidala, Karl-Magnus Persson, Mattias Borg & Lars-Erik Wernersson, 2020 Aug 3, In: IEEE Electron Device Letters. 41, 9, p. 1432-1435 9154433.

    Research output: Contribution to journalArticle

  5. III-V Nanowires for High-Speed Electronics

    Fredrik Lindelöw, 2020 May 20, Series of licentiate and doctoral theses, 1654-790X ed. Lund, Sweden: Lund University. 130 p.

    Research output: ThesisDoctoral Thesis (compilation)

  6. Electrical Characterisation of III-V Nanowire MOSFETs

    Markus Hellenbrand, 2020 May, Lund: Department of Electrical and Information Technology, Lund University. 156 p.

    Research output: ThesisDoctoral Thesis (compilation)

  7. Weyl Semi-Metal-Based High-Frequency Amplifiers

    A. Toniato, B. Gotsmann, E. Lind & C. B. Zota, 2020 Feb 13, 2019 IEEE International Electron Devices Meeting, IEDM . Institute of Electrical and Electronics Engineers Inc., 8993575. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2019-December).

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  8. Reduced annealing temperature for ferroelectric HZO on InAs with enhanced polarization

    Anton E.O. Persson, Robin Athle, Pontus Littow, Karl Magnus Persson, Johannes Svensson, Mattias Borg & Lars Erik Wernersson, 2020 Feb 10, In: Applied Physics Letters. 116, 6, 062902.

    Research output: Contribution to journalArticle

  9. Nanowire Tunnel FET with Simultaneously Reduced Subthermionic Subthreshold Swing and Off-Current due to Negative Capacitance and Voltage Pinning Effects

    Ali Saeidi, Teodor Rosca, Elvedin Memisevic, Igor Stolichnov, Matteo Cavalieri, Lars Erik Wernersson & Adrian M. Ionescu, 2020, In: Nano Letters. 20, 5, p. 3255-3262 8 p.

    Research output: Contribution to journalArticle

  10. Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving Smin= 32 mV/dec and gm/ID= 100 V-1

    Abinaya Krishnaraja, Johannes Svensson & Lars Erik Wernersson, 2020, 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020. Institute of Electrical and Electronics Engineers Inc., p. 17-18 2 p. 9131656

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  11. 2019
  12. Pulsed Millimeter Wave Radar for Hand Gesture Sensing and Classification

    Lars Ohlsson Fhager, Sebastian Heunisch, Hannes Dahlberg, Anton Evertsson & Lars Erik Wernersson, 2019 Dec, In: IEEE Sensors Letters. 3, 12, 3502404.

    Research output: Contribution to journalLetter

  13. Millimeter-Wave Radar for Low-Power Applications

    Sebastian Heunisch, 2019 Aug 19, Lund: Lund University. 156 p.

    Research output: ThesisDoctoral Thesis (compilation)

  14. Investigation of Reverse Filament Formation in ITO/HfO2-based RRAM

    Karl-magnus Persson, Saketh Ram Mamidala, Mattias Borg & Lars-erik Wernersson, 2019 Jun, 2019 Device Research Conference (DRC). IEEE - Institute of Electrical and Electronics Engineers Inc., p. 91-92 2 p.

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  15. Integration of InSb on Si by Rapid Melt Growth

    Heera Menon, Matthew Steer Matthew Steer, Iain Thayne Iain Thayne, Johannes Svensson, Lars-Erik Wernersson & Mattias Borg, 2019 May 1.

    Research output: Contribution to conferenceAbstract

  16. Trap-aware compact modeling and power-performance assessment of III-V tunnel FET

    Yang Xiang, Dmitry Yakimets, Saurabh Sant, Elvedin Memisevic, Marie Garcia Bardon, Anne S. Verhulst, Bertrand Parvais, Andreas Schenk, Lars Erik Wernersson & Guido Groeseneken, 2019 Feb 14, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 8640183

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  17. Low-Temperature Front-Side BEOL Technology with Circuit Level Multiline Thru-Reflect-Line Kit for III-V MOSFETs on Silicon

    Stefan Andric, Lars Ohlsson & Lars Erik Wenrersson, 2019 Feb 7, 2019 92nd ARFTG Microwave Measurement Conference: Next Generation Microwave and Millimeter-Wave Measurement Techniques and Systems, ARFTG 2019. Institute of Electrical and Electronics Engineers Inc., 8637222

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  18. An Experimental Study of Heterostructure Tunnel FET Nanowire Arrays: Digital and Analog Figures of Merit from 300K to 10K

    T. Rosca, A. Saeidi, E. Memisevic, L. E. Wernersson & A. M. Ionescu, 2019 Jan 17, 2018 IEEE International Electron Devices Meeting, IEDM 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018. p. 13.5.1-13.5.4 8614665

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  19. Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si

    Adam Jönsson, Johannes Svensson & Lars-Erik Wernersson, 2019 Jan 17, 2018 IEEE International Electron Devices Meeting (IEDM). IEEE - Institute of Electrical and Electronics Engineers Inc., p. 39.3.1-39.3.4

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  20. Vertical Gate-All-Around Nanowire GaSb-InAs Core-Shell n-Type Tunnel FETs

    T. Vasen, P. Ramvall, A. Afzalian, G. Doornbos, M. Holland, C. Thelander, K. A. Dick, L. E. Wernersson & M. Passlack, 2019 Jan 17, In: Scientific Reports. 9, 1, 202.

    Research output: Contribution to journalArticle

  21. Core-shell tfet developments and tfet limitations

    M. Passlack, P. Ramvall, T. Vasen, A. Afzalian, C. Thelander, K. A. Dick, L. E. Wernersson, G. Doornbos & M. Holland, 2019, 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019. Institute of Electrical and Electronics Engineers Inc., 8804674

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  22. Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy

    Mattias Borg, Lynne Gignac, John Bruley, Andreas Malmgren, Saurabh Sant, Clarissa Convertino, Marta D. Rossell, Marilyne Sousa, Chris Breslin, Heike Riel, Kirsten E. Moselund & Heinz Schmid, 2019, In: Nanotechnology. 30, 8, 084004.

    Research output: Contribution to journalArticle

  23. Low-complexity III-V circuitry for millimeter wave communication and radar

    Lars Erik Wernersson, 2019, 2019 IEEE Globecom Workshops, GC Wkshps 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 9024570. (2019 IEEE Globecom Workshops, GC Wkshps 2019 - Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  24. Vertical III-V Nanowire MOSFETs

    Olli-Pekka Kilpi, 2019, Department of Electrical and Information Technology, Lund University. 90 p.

    Research output: ThesisDoctoral Thesis (compilation)

  25. 2018
  26. InAs-oxide interface composition and stability upon thermal oxidation and high-k atomic layer deposition

    Andrea Troian, Johan V. Knutsson, Sarah R. McKibbin, Sofie Yngman, Aein S. Babadi, Lars Erik Wernersson, Anders Mikkelsen & Rainer Timm, 2018 Dec 1, In: AIP Advances. 8, 12, 125227.

    Research output: Contribution to journalArticle

  27. Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade

    Elvedin Memisevic, Johannes Svensson, Erik Lind & Lars Erik Wernersson, 2018 Jul, In: IEEE Electron Device Letters. 39, 7, p. 1089-1091

    Research output: Contribution to journalArticle

  28. Effect of Gate Oxide Defects on Tunnel Transistor RF Performance

    Markus Hellenbrand, Elvedin Memisevic, Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 Jun 25, 2018 76th Device Research Conference (DRC). IEEE - Institute of Electrical and Electronics Engineers Inc., p. 137-138 2 p.

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

  29. Fabrication of Tunnel Field-Effect Transistors

    Abinaya Krishnaraja, Elvedin Memisevic, Markus Hellenbrand, Johannes Svensson, Erik Lind & Lars-Erik Wernersson, 2018 May 24, (Unpublished).

    Research output: Contribution to conferencePaper, not in proceeding

  30. RF Characterisation of Vertical III-V Nanowire Tunnel FETs

    Markus Hellenbrand, Elvedin Memisevic, Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 May 24, (Unpublished).

    Research output: Contribution to conferencePaper, not in proceeding

  31. Capacitance Measurements in Vertical III-V Nanowire TFETs

    Markus Hellenbrand, Elvedin Memisevic, Johannes Svensson, Abinaya Krishnaraja, Erik Lind & Lars-Erik Wernersson, 2018 May 4, In: IEEE Electron Device Letters. 39, 7, p. 943-946 4 p.

    Research output: Contribution to journalLetter

  32. CMOS Integration Based on All-III-V Materials

    Adam Jönsson, Johannes Svensson & Lars-Erik Wernersson, 2018 Mar 10.

    Research output: Contribution to conferenceAbstract

  33. Sub-100-nm gate-length scaling of vertical InAs/InGaAs nanowire MOSFETs on Si

    Olli Pekka Kilpi, Johannes Svensson & Lars Erik Wernersson, 2018 Jan 23, 2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part F134366. p. 17.3.1-17.3.4

    Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

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