A 0.8mm2 9.6mW Implementation of a Multicarrier Faster-Than-Nyquist Signaling Iterative Decoder in 65nm CMOS

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Bibtex

@inproceedings{65edaea4df954ec6b15d22bac5f756d5,
title = "A 0.8mm2 9.6mW Implementation of a Multicarrier Faster-Than-Nyquist Signaling Iterative Decoder in 65nm CMOS",
abstract = "This paper presents a decoder for multi-carrier modulated signals employing Faster-than-Nyquist (FTN) signaling. FTN signaling is a method of improving bandwidth efficiency at the expense of higher processing complexity in the transceiver. The decoder can switch between orthogonal and FTN signaling modes and exploits channel properties to improve bandwidth efficiency. The decoder is fabricated in a 65nm CMOS process and occupies an area of 0.8mm2, with a power consumption of 9.6mW at 1.2V when clocked at 100MHz. To the best of our knowledge, those measurement results are from the first-ever silicon implementation of a decoder for FTN signaling.",
keywords = "bandwidth efficiency, Iterative decoding: multicarrier, Faster-than-nyquist",
author = "Deepak Dasalukunte and Fredrik Rusek and Viktor {\"O}wall",
year = "2012",
language = "English",
isbn = "978-1-4673-2212-6",
publisher = "IEEE--Institute of Electrical and Electronics Engineers Inc.",
pages = "173--176",
booktitle = "[Host publication title missing]",

}