A Decade Frequency Range CMOS Power Amplifier for Sub-6-GHz Cellular Terminals

Research output: Contribution to journalArticle


A wideband 65-nm CMOS power amplifier (PA) is presented, with a decade frequency range from 600 MHz to 6.0 GHz. In this frequency range, the output power exceeds 26.6 dBm and the power gain and power-added efficiency (PAE) exceed 18.1 dB and 49%, respectively. For a 7.5-dB peak-to-average-power-ratio (PAPR) long term evolution (LTE) signal at 1.9 GHz, the circuit provides an average output power of 19 dBm, with a PAE of 40%, and an adjacent channel leakage ratio (ACLR) exceeding -31 dBc. In LTE measurements at 5.9 GHz, the average output power, PAE, and ACLR are 18.5 dBm, 38.8%, and -30 dBc, respectively, using supply modulation and baseband predistortion. The wide bandwidth (BW) and high performance are achieved by introducing a dual output topology with an off-chip higher order output-matching network, combined with a positive feedback cross-coupled differential cascode amplifier stage. By using supply modulation and dynamic gate bias with an injection-locked PA, improved back-off efficiency, and acceptable out-of-band and in-band distortion is obtained. The integrated circuit occupies an area of 1.0 \times 0.73 mm2 in standard 65-nm CMOS technology and uses a supply of 3.0 V.


Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Communication Systems


  • Broadband, CMOS, dynamic biasing, efficiency, injection lock, long term evolution (LTE), multiband, power amplifier (PA)
Original languageEnglish
Article number8933336
Pages (from-to)54-57
Number of pages4
JournalIEEE Microwave and Wireless Components Letters
Issue number1
Publication statusPublished - 2020
Publication categoryResearch