An Accurate Analysis of Phase Noise in CMOS Ring Oscillators

Research output: Contribution to journalArticle


We present an accurate analysis of phase noise in ring oscillators, where each stage in the ring is a CMOS inverter loaded by a capacitance. Closed-form phase noise expressions are obtained in both 1/f2 and 1/f3 offset frequency regions, displaying an excellent agreement with numerical simulations using either ideal Verilog-A MOS models (allowing theoretical predictions to be tested with exactly the same assumptions under which they were derived), or commercial BSIM4 MOS models.


External organisations
  • University of Pavia
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Electrical Engineering, Electronic Engineering, Information Engineering


  • impulse sensitivity function (ISF)., Phase noise, ring oscillators
Original languageEnglish
Pages (from-to)1-1
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Early online date2018
Publication statusPublished - 2018
Publication categoryResearch