Code Generation for a SIMD Architecture with Custom Memory Organisation

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Abstract

Today’s multimedia and DSP applications impose requirements on performance and power consumption that only custom processor architectures with SIMD capabilities can satisfy. However, the specific features of such architectures, including vector operations and high-bandwidth complex memory organization, make them notoriously complicated and time consuming to program. In this paper we present an automated code generation approach that dramatically reduces the effort of programming such architectures, by carrying out instruction scheduling and memory allocation based on a constraint programming formulation. Furthermore, the quality of the generated code is close to that of hand-written code by an experienced programmer with knowledge of the architecture. We demonstrate the viability of our approach on an existing custom heterogeneous DSP architecture, by compiling and running a number of typical DSP kernels, and comparing the results to hand-optimized code.

Details

Authors
Organisations
External organisations
  • Linköping University
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Embedded Systems
  • Computer Science
Original languageEnglish
Title of host publication2016 Conference on Design and Architectures for Signal and Image Processing (DASIP)
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages90-97
ISBN (Electronic)979-1-0922-7915-3
Publication statusPublished - 2017
Publication categoryResearch
Peer-reviewedYes
EventConference on Design & Architectures for Signal & Image Processing (DASIP 2016) - Rennes, France
Duration: 2016 Oct 122016 Oct 14

Conference

ConferenceConference on Design & Architectures for Signal & Image Processing (DASIP 2016)
CountryFrance
CityRennes
Period2016/10/122016/10/14