Efficient Hardware Implementations of Grain-128AEAD

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding


We implement the Grain-128AEAD stream cipher in hardware, using a 65 nm library. By exploring different optimization techniques, both at RTL level but also during synthesis, we first target high throughput, then low power. We reach over 33 GB/s targeting a high-speed design, at expense of power and area. We also show that, when targeting low power, the design only requires 0.23 $${\upmu }$$W running at 100 kHz. By unrolling the design, the energy consumed when encrypting a fixed length message decreases, making the 64 parallelized version the most energy efficient implementation, requiring only 11.2 nJ when encrypting a 64 kbit message. At the same time, the best throughput/power ratio is achieved at a parallelization of 4.


External organisations
  • Lund University
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Computer Science


  • ASIC, Grain, Hardware design, NIST, Stream cipher
Original languageEnglish
Title of host publicationProgress in Cryptology – INDOCRYPT 2019 - 20th International Conference on Cryptology Proceedings
EditorsFeng Hao, Sushmita Ruj, Sushmita Ruj, Sourav Sen Gupta
PublisherSpringer Gabler
Number of pages19
ISBN (Print)9783030354220
Publication statusPublished - 2019
Publication categoryResearch
Event20th International Conference on Cryptology in India, INDOCRYPT 2019 - Hyderabad, India
Duration: 2019 Dec 152019 Dec 18

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume11898 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference20th International Conference on Cryptology in India, INDOCRYPT 2019

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