Hardware Efficient Approximative Matrix Inversion for Linear Pre-Coding in Massive MIMO

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Abstract

This paper describes a hardware efficient linear pre-coder for Massive MIMO Base Stations (BSs) comprising a very large number of antennas, say, in the order of 100s, serving multiple users simultaneously. To avoid hardware demanding direct matrix inversions required for the Zero-Forcing (ZF) pre-coder, we use low complexity Neumann series based approximations. Furthermore, we propose a method to speed-up the convergence of the Neumann series by using tri-diagonal pre-condition matrices, which lowers the complexity even further. As a proof of concept a flexible VLSI architecture is presented with an implementation supporting matrix inversion of sizes up-to 16 × 16. In 65 nm CMOS, a throughput of 0.5M matrix inversions per sec is achieved at clock frequency of 420 MHz with a 104K gate count.

Details

Authors
Organisations
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • Massive MIMO, Pre-coder
Original languageEnglish
Title of host publication[Host publication title missing]
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages1700-1703
Number of pages4
Publication statusPublished - 2014
Publication categoryResearch
Peer-reviewedYes
EventIEEE International Symposium on Circuits and Systems (ISCAS), 2014 - Melbourne, Austrailia, Melbourne, Australia
Duration: 2014 Jun 12014 Jun 5

Publication series

Name
ISSN (Print)2158-1525
ISSN (Electronic)0271-4310

Conference

ConferenceIEEE International Symposium on Circuits and Systems (ISCAS), 2014
CountryAustralia
CityMelbourne
Period2014/06/012014/06/05

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