Implementation of Low-latency Signal Processing and Data Shuffling for TDD massive MIMO Systems

Research output: Contribution to conferencePaper, not in proceeding

Abstract

Low latency signal processing and high throughput implementations are required in order to realize real-time TDD massive MIMO communications, especially in high mobility scenarios. One of the main challenges is that the up-link and down-link turnaround time has to be within the coherence time of the wireless channel to enable efficient use of reciprocity. This paper presents a hardware architecture and implementation of this critical signal processing path, including channel estimation, QRD-based MMSE decoder/precoder and distributed reciprocity calibration. Furthermore, we detail a switch-based router implementation to tackle the stringent throughput and latency requirements on the data shuffling network. The proposed architecture was verified on the LuMaMi testbed, based on the NI SDR platform. The implementation supports real-time TDD transmission in a 128x12 massive MIMO setup using 20 MHz channel bandwidth. The processing latency in the critical path is less than 0.15 ms, enabling reciprocity-based TDD massive MIMO for high-mobility scenarios.

Details

Authors
Organisations
External organisations
  • National Instruments
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Signal Processing

Keywords

  • Massive MIMO, TDD, Low-latency, SDR
Original languageEnglish
Pages260-265
Number of pages6
Publication statusPublished - 2017
Publication categoryResearch
Peer-reviewedYes
EventIEEE International Workshop on Signal Processing Systems - The Hyatt Regency North Dallas, Dallas, United States
Duration: 2016 Oct 262016 Oct 28
http://sips2016.rice.edu/

Workshop

WorkshopIEEE International Workshop on Signal Processing Systems
Abbreviated titleSiPS 2016
CountryUnited States
CityDallas
Period2016/10/262016/10/28
Internet address

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