Interleaver structures for turbo codes with reduced storage memory requirement

Research output: Chapter in Book/Report/Conference proceedingPaper in conference proceeding

Abstract

This paper describes two interleaver structures that reduce the memory requirement for the storage of interleaver rules. The first structure offers memory reductions of more than 50%, compared to storing the entire interleaver vector. The second structure is useful when a range of interleaver sizes are to be stored, offering memory reductions asymptotically approaching 50%. By combining the two structures, a total memory reduction of approximately 75% is achieved. This is obtained without any significant reduction of the error correcting performance of the codes

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Subject classification (UKÄ) – MANDATORY

  • Electrical Engineering, Electronic Engineering, Information Engineering
Original languageEnglish
Title of host publicationProc. IEEE Vehicular Technology Conference
PublisherIEEE - Institute of Electrical and Electronics Engineers Inc.
Pages1585-1589
Number of pages5
Volume3
ISBN (Print)0-7803-5435-4
Publication statusPublished - 1999
Publication categoryResearch
Peer-reviewedYes
EventIEEE VTS 50th Vehicular Technology Conference, VTC 1999 - Fall. - Amsterdam, The Netherlands, Amsterdam, Netherlands
Duration: 1999 Sep 191999 Sep 22

Publication series

Name
Volume3

Conference

ConferenceIEEE VTS 50th Vehicular Technology Conference, VTC 1999 - Fall.
CountryNetherlands
CityAmsterdam
Period1999/09/191999/09/22

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